MAX1365ECM+ Maxim Integrated Products, MAX1365ECM+ Datasheet - Page 20

• Manufacturer Part Number: MAX1365ECM+
• Description: IC PANEL METER 4.5 DIG 48LQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1365ECM+

• Display Type: LED
• Configuration: 7 Segment
• Digits Or Characters: A/D 4.5 Digits
• Voltage - Supply: 2.7 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Interface: -

However, if the LEDs used have a higher forward voltage
drop than 2.2V, the supply voltage must be raised
accordingly to ensure that the driver always has at least
0.8V headroom. For a LEDV supply voltage of 2.7V, the
maximum LED forward voltage is 1.9V to ensure 0.8V dri-
ver headroom. The voltage drop across the drivers with
a nominal +5V supply (5.0V - 2.2V = 2.8V) is almost
three times the drop across the drivers with a nominal
3.3V supply (3.3V - 2.2V = 1.1V). Therefore, the driver’s
power dissipation increases three times. The power dis-
sipation in the part causes the junction temperature to
rise accordingly. In the high ambient temperature case,
the total junction temperature may be very high
(> +125°C). At higher junction temperatures, the ADC
performance degrades. To ensure the dissipation limit
for the MAX1365/MAX1367 is not exceeded and the
ADC performance is not degraded; a diode can be
inserted between the power supply and LEDV.
An external depletion-mode FET (DMOS) works in con-
junction with the regulator circuit to supply the V/I con-
verter with loop power. REG_FORCE regulates the gate
of the DMOS so that the drain voltage is 5.2V (typ) and
allows the 4–20mA (0 to 16mA) loop to be directly pow-
ered from a 7V to 30V supply. DMOS I
current output at 4-20OUT, a 4mA offset current, and
1mA (typ) consumed by the V/I converter.
For offset-enabled mode (EN_I = 1):
where I
For offset-disabled mode (EN_I = 0):
where I
Table 7 provides the FET characteristics for selecting
an external DMOS transistor. The DN25D FET transistor
from Supertex meets all the requirements of Table 7.
Other suitable transistors include ND2020L and
ND2410L from Siliconix.
Connect a 0.1µF capacitor between CMP and
REG_FORCE to ensure stable regulator compensation.
Stand-Alone, 4.5-/3.5-Digit Panel Meters
with 4–20mA Output
20
______________________________________________________________________________________
DS
DS
is the current in the DMOS.
is the current in the DMOS.
I
DS
Selecting Depletion-Mode FET
I
= I
DS
4-20OUT
= I
4-20OUT
+ 4mA + 1mA
+ 1mA
DS
consists of the
INL is the deviation of the values on an actual transfer
function from a straight line. This straight line is either a
best-straight-line fit or a line drawn between the end
points of the transfer function, once offset and gain
errors have been nullified. INL for the MAX1365/
MAX1367 is measured using the end-point method.
DNL is the difference between an actual step width and
the ideal value of ±1 LSB. A DNL error specification of
less than ±1 LSB guarantees no missing codes and a
monotonic transfer function.
Rollover error is defined as the absolute-value differ-
ence between a near positive full-scale reading and
near negative full-scale reading. Rollover error is tested
by applying a full-scale positive voltage, swapping
AIN+ and AIN-, and adding the results.
Ideally, with AIN+ connected to AIN-, the MAX1365/
MAX1367 LED displays zero. Zero-input reading is the
measured deviation from the ideal zero and the actual
measured point.
Gain error is the amount of deviation between the mea-
sured full-scale transition point and the ideal full-scale
transition point.
CMR is the ability of a device to reject a signal that is
common to both input terminals. The common-mode
signal can be either an AC or a DC signal or a combi-
nation of the two. CMR is often expressed in decibels.
Normal-mode rejection is a measure of how much output
changes when 50Hz and 60Hz signals are injected into
only one of the differential inputs. The MAX1365/
MAX1367 sigma-delta converter uses its internal digital
filter to provide normal-mode rejection to both 50Hz and
60Hz power-line frequencies simultaneously.
Normal-Mode 50Hz and 60Hz Rejection
Common-Mode Rejection (CMR)
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Zero-Input Reading
(Simultaneously)
Rollover Error
Definitions
Gain Error