CS5462-ISZ Cirrus Logic Inc, CS5462-ISZ Datasheet - Page 14

IC ENERGY METERING 1PHASE 24SSOP

CS5462-ISZ

Manufacturer Part Number
CS5462-ISZ
Description
IC ENERGY METERING 1PHASE 24SSOP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5462-ISZ

Input Impedance
30 KOhm
Measurement Error
0.1%
Voltage - I/o High
0.8V
Voltage - I/o Low
0.2V
Current - Supply
2.9mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Meter Type
Single Phase
Input Voltage
5V
No. Of Outputs
2
Power Dissipation Pd
500mW
Supply Voltage Range
3.3V To 5V
No. Of Pins
24
Operating Temperature Range
-40°C To +85°C
Termination Type
SMD
No. Of Channels
2
Output Voltage Range
2.4 V to 2.6 V
Output Current
1 uA
Input Voltage Range
2.4 V to 2.6 V
Input Current
25 nA
Power Dissipation
500 mW
Mounting Style
SMD/SMT
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5462-ISZ
Manufacturer:
CIRRUS
Quantity:
20 000
which time the CS5462 will configure itself and re-
sume normal operation.
4.6
XIN and XOUT are the input and output of an in-
verting amplifier which can provide oscillation and
can be configured as an on-chip oscillator, as
shown in Figure 8. The oscillator circuit is designed
to work with a quartz crystal or a ceramic resona-
tor. To reduce circuit cost, two load capacitors C1
and C2 are integrated in the device, one between
XIN and DGND, one between XOUT and DGND.
Lead lengths should be minimized to reduce stray
capacitance. To drive the device from an external
clock source, XOUT should be left unconnected
while XIN is driven by the external circuitry. There
is an amplifier between XIN and the digital section
which provides CMOS level signals. This amplifier
works with sinusoidal inputs so there are no prob-
lems with slow edge times.
14
Voltage
Supply
2.5 V
5 V
4 V
1 V
0 V
Oscillator Characteristics
Figure 8. Oscillator Connection
DGND
XOUT
Reset
Figure 7. Power-on Reset
XIN
Operation
C1
Normal
C2
C1 =
C2 =
Reset
Oscillator
22 pF
Circuit
Time
4.7
EXAMPLE:
with an 2 Hz maximum pulse output frequency on
the E1, E2 pins with 500 mV
puts of the current and voltage channels and the
high pass filter enabled on the current channel
only. Using the figure below these settings can be
selected with two connections.
By directly connecting FREQ with P4 and IGAIN
with P5 the CS5462 is configured to drive a step-
per motor with a maximum pulse output rate of
2 Hz, to support an input range of 50 0mV
to remove all DC content on the current signals by
enabling the HPFs on the Ich. The CS5462 is now
ready for calibration.
Before applying power to the chip, connect the
CAL0 and CAL1 pins to P4. This will select
0% + 0% = 0% gain adjustment. After making this
connection the CS5462 is ready to be calibrated.
Once power is applied the CS5462 will begin a
startup sequence in which it will scan the FREQ,
IGAIN, CAL0, and CAL1 pins. After determining
which connections are made the FREQ, IGAIN,
CAL0, and CAL1 pins will become high impedance
inputs and the part will begin normal operation and
start converting. If on-chip calibration is required
place known voltages across the inputs on IIN±
and VIN±.
For example, 150 mV
used for both the current and voltage inputs.
424.26 mV
scale input of both the current and voltage chan-
nels. With this input on both channels the expected
pulse
84.853% * 84.853% = 72% of full scale. This
Figure 9. Calibration, Frequency Select, and
P1
P2
P3
P4
P5
P6
P7
User Defined Settings
+4.2%
+2.8%
CAL1
-1.4%
-2.8%
-4.2%
+1.4
0
P-P
Design a hybrid stepper motor meter
output
is ~84.853% of the maximum full
+0.6%
+0.4%
+0.2%
CAL0
-0.2%
-0.4%
-0.6%
0
PGA Select
RMS
0.25 Hz (stp)
0.5 Hz (stp)
16 Hz (mc)
1 Hz (stp)
2 Hz (stp)
4 Hz (stp)
4 Hz (mc)
FREQ
= ~424.26 mV
P-P
frequency
10x
50x
10x
50x
10x
50x
10x
signal on the in-
500mV
100mV
500mV
100mV
500mV
100mV
500mV
CS5462
IGAIN
P-P
P-P
hpf both
hpf both
hpf Vch
hpf Ich
hpf Ich
no hpf
no hpf
will be
, and
is

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