ADE7756ARS Analog Devices Inc, ADE7756ARS Datasheet - Page 20

IC ENERGY METERING 1PHASE 20SSOP

ADE7756ARS

Manufacturer Part Number
ADE7756ARS
Description
IC ENERGY METERING 1PHASE 20SSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADE7756ARS

Rohs Status
RoHS non-compliant
Input Impedance
390 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.8V
Current - Supply
3mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP (0.200", 5.30mm Width)
Meter Type
Single Phase
Lead Free Status / RoHS Status
Not Compliant

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ADE7756
PHASE COMPENSATION
When the HPF is disabled, the phase error between Channel 1
and Channel 2 is zero from dc to 3.5 kHz. When HPF1 is enabled,
Channel 1 has a phase response illustrated in Figures 23 and 24.
Also shown in Figure 25 is the magnitude response of the filter.
As can be seen from the plots, the phase response is almost zero
from 45 Hz to 1 kHz. This is all that is required in typical energy
measurement applications.
However, despite being internally phase compensated the
ADE7756 must work with transducers that may have inherent
phase errors. For example, a phase error of 0.1° to 0.3° is not
uncommon for a CT (Current Transformer). These phase errors
can vary from part to part and must be corrected in order to
perform accurate power calculations. The errors associated with
phase mismatch are particularly noticeable at low power factors.
The ADE7756 provides a means of digitally calibrating these
small phase errors. The ADE7756 allows a small time delay or
time advance to be introduced into the signal processing chain
in order to compensate for small phase errors. Because the
compensation is in time, this technique should only be used for
small phase errors in the range of 0.1° to 0.5°. Correcting large
phase errors using a time shift technique can introduce signifi-
cant phase errors at higher harmonics.
The Phase Calibration register (PHCAL[5:0]) is a two’s comple-
ment 6-bit signed register that can vary the time delay in the
Channel 2 signal path from –143 µs to +143 µs (CLKIN =
3.579545 MHz). One LSB is equivalent to 4.47 µs. With a line
frequency of 60 Hz, this gives a phase resolution of 0.097° at the
fundamental (i.e., 360° × 4.47 µs × 60 Hz). Figure 22 illustrates
how the phase compensation is used to remove a 0.097° phase
lead in Channel 1 due to some external transducer. In order to
cancel the lead (0.097°) in Channel 1, a phase lead must also be
introduced into Channel 2. The resolution of the phase adjustment
allows the introduction of a phase lead of 0.097°. The phase lead is
achieved by introducing a time advance into Channel 2. A time
advance of 4.47 µs is made by writing –1 (3Fh) to the time delay
block, thus reducing the amount of time delay by 4.47 µs.
V1
V2
V1N
V2N
V1P
V2P
V1
V2
PGA1
PGA2
60Hz
0.097"
ADC1
ADC2
1
–143 s TO +143 s
5
1 1 1 1 1 1
4.47 s/LSB
PHCAL[5:0]
HPF
DELAY
BLOCK
20
0
CHANNEL 2 DELAY
REDUCED BY 4.47 s
(0.097 LEAD AT 60Hz)
3Fh IN PHCAL[5:0]
V1
60Hz
20
V2
LPF2
–0.05
–0.10
–0.05
–0.10
–0.10
–0.20
–0.30
–0.40
0.30
0.25
0.20
0.15
0.10
0.05
0.10
0.40
0.30
0.20
0.10
0.00
0.30
0.25
0.20
0.15
0.05
0
0
0
54
40
100
45
56
200
300
50
58
FREQUENCY – Hz
400
FREQUENCY – Hz
500
55
60
600
60
62
700
800
64
65
900 1000
68
70

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