LTC4221CGN#PBF Linear Technology, LTC4221CGN#PBF Datasheet
LTC4221CGN#PBF
Specifications of LTC4221CGN#PBF
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LTC4221CGN#PBF Summary of contents
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... Electronic Circuit Breaker ■ Power Supply Sequencing Live Board Insertion and Removal ■ ■ Industrial High Side Switch/Circuit Breaker , LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. U TYPICAL APPLICATIO BACKPLANE PCB EDGE CONNECTOR CONNECTOR ...
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... LTC4221C ............................................... 0°C to 70°C LTC4221I ............................................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300° ORDER I FOR ATIO LEAD FREE FINISH TAPE AND REEL LTC4221CGN#PBF LTC4221CGN#TRPBF LTC4221IGN#PBF LTC4221IGN#TRPBF LEAD BASED FINISH TAPE AND REEL LTC4221CGN LTC4221CGN#TR LTC4221IGN LTC4221IGN#TR Consult LTC Marketing for parts specified with wider operating temperature ranges ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER I GATE n Output Current GATE(UP) I GATE n Output Current GATE(DN) I GATE n Output Current GATE(FSTDN) ΔV External N-Channel Gate Drive GATE GATE n Overvoltage Lockout Threshold ...
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LTC4221 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER t FAULT Low to GATE n Discharging P(FAULT-GATE Comparator Trip to GATE n P(OV-GATE) Discharging t Filter Comparator Trip to GATE n P(FILTER-GATE) Discharging ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS V vs Temperature SENSE(FC) 102 CC1 V = 3.3V CC2 101.5 101.0 100.5 100.0 99.5 99.0 50 100 125 –50 – TEMPERATURE (°C) 4221 G07 V vs ...
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LTC4221 W U TYPICAL PERFOR A CE CHARACTERISTICS ΔV (V – GATE2 GATE2 CC1 vs Temperature 2.7V CC1 CC2 3.3V CC1 CC2 V = 13.5V ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS V vs Temperature FB(OV) 0.825 CC1 0.824 V = 3.3V CC2 0.823 0.822 0.821 0.820 0.819 0.818 0.817 0.816 0.815 – 100 –25 TEMPERATURE (°C) 4221 ...
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LTC4221 W U TYPICAL PERFOR A CE CHARACTERISTICS I vs Temperature FAULT(UP) –3 2.7V CC2 CC1 CC1 FAULT –3 13.5V CC1 –3.5 –3.7 –3.9 –4.1 –4.3 –4.5 ...
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CTIO S GATE1 (Pin 4): Channel 1 Gate Drive. This pin is the high side gate drive of an external N-channel MOSFET. When V < 0.821V, GATE1 is held low by a 100μA current ON1 ...
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LTC4221 W BLOCK DIAGRA V CHARGE CC1 PUMP 1 OSCILLATOR CHARGE V PUMP 2 CC1 ON1 1 ON2 16 V CC1 105μA FILTER 8 1.8μA V CC1 3.8μA 0.816V FAULT 7 V CC1 + 9mV TO 25mV – ...
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U OPERATIO Hot Circuit Insertion When circuit boards are inserted into a live backplane, the supply bypass capacitors can draw huge transient cur- rents from the power bus as they charge. The flow of current may damage the connector pins ...
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LTC4221 U OPERATIO V CLEARS (UVL) + ΔV ON1 > V ON(RESET) ON(RESETHYST) ON2 > V ON(OFF) CHECK GATE < V ON1 > V CHECK GATE < ...
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U U APPLICATIO S I FOR ATIO Undervoltage Lockout An internal undervoltage lockout (UVLO) occurs if either V supply is too low for normal operation. The LTC4221 CC is kept in lockout mode in which the internal charge pumps are ...
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LTC4221 U U APPLICATIO S I FOR ATIO (UVL 0.851V ON1 TIMER GATE1 V OUT1 PWRGD1 ON2 GATE2 V OUT2 UVLO sequential power up from time points and a sequential power-down ...
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U U APPLICATIO S I FOR ATIO generate a logic high output to indicate that V An internal high-to-low glitch filter helps to prevent nega- tive voltage transients on each FB pin from deasserting its PWRGD. The relationship between glitch ...
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LTC4221 U U APPLICATIO S I FOR ATIO ON1 clears its off threshold and the initial timing cycle is complete, the GATE1 pin is pulled 9.5μA current source connected to the charge pump output during the channel ...
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U U APPLICATIO S I FOR ATIO duty cycle of more than 1.8% will eventually trip the circuit breaker. Figure 8 shows the circuit breaker response time in seconds normalized to 1μF. The asymmetric charging and discharging of FILTER is ...
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LTC4221 U U APPLICATIO S I FOR ATIO The LTC4221 can also be configured to automatically retry after a fault condition. As shown in Figure 10, the FAULT (which has an internal 3.8μA pull-up current source) and both ON pins ...
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U U APPLICATIO S I FOR ATIO latch is cleared and the FAULT pin sources a 3.8μA pull-up current to charge The typical delay t ON1 ( ) 851 . V ...
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LTC4221 U U APPLICATIO S I FOR ATIO Timer Function The TIMER pin controls the initial cycle and the channel start-up cycles with an external capacitor, C are two comparator thresholds (0.4V). In addition, the pin has a ...
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U U APPLICATIO S I FOR ATIO Start-Up Cycle With Current Limit During a channel start-up cycle, if the inrush current as according to Equation (12) is large enough to cause a voltage drop greater than the active current limit ...
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LTC4221 U U APPLICATIO S I FOR ATIO supply voltages, the LTC4221 can drive any MOSFET rated with 4.5V or 2.5V gate drive. For higher supply voltages up to 13.5V, the LTC4221 can drive any MOSFET rated with a 10V ...
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U U APPLICATIO S I FOR ATIO the input supply line, exhibiting a peak overshoot to 2.5 times the steady-state value. This peak is followed by a damped sinusoidal response whose duration and period are dependent on the resonant circuit ...
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LTC4221 U U APPLICATIO S I FOR ATIO TRACK WIDTH W CHANNEL 2 W INPUT Z2 • • • VIAS GND • • Z1 CHANNEL 1 W INPUT NOTE: DRAWING IS NOT TO SCALE *ADDITIONAL DETAILS OMITTED FOR CLARITY Figure ...
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U APPE DIX Table 2. N-Channel Selection Guide CURRENT LEVEL (A) PART NUMBER MMDF3N02HD MMSF5N02HD MTB50N06V MTB75N05HD Table 3. Manufacturers’ Web Sites MANUFACTURER TEMIC Semiconductor International Rectifier ON ...
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LTC4221 U TYPICAL APPLICATIO S Simultaneous Turn-On with Autoretry Function—Linked Current Limits BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) LONG V CC1 3.3V LONG V CC2 2. 16.5k R1 4.22k LONG GND Z1, Z2: SMAJ10 BACKPLANE PCB EDGE ...
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... DRAWING NOT TO SCALE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. Sequenced Up/Down, Channel 1 Up First, Down Last ...
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... Sequenced Power Good Outputs Q1 V IRF7413 3. SENSE2 0.004Ω IRF7413 V 2. 14.3k SENSE2 GATE2 CC2 FB2 R F4 5.11k PWRGD2 LTC4221 PWRGD1 R F1 20k FB1 R F2 5.11k 4221 TA06 LT 0707 REV A • PRINTED IN THE USA © LINEAR TECHNOLOGY CORPORATION 2004 OUT1 OUT2 4221fa ...