MAX5956BEEE+ Maxim Integrated Products, MAX5956BEEE+ Datasheet - Page 8

IC DUAL HOT-SWAP CTRLR 16-QSOP

MAX5956BEEE+

Manufacturer Part Number
MAX5956BEEE+
Description
IC DUAL HOT-SWAP CTRLR 16-QSOP
Manufacturer
Maxim Integrated Products
Type
Hot-Swap Controllerr
Datasheet

Specifications of MAX5956BEEE+

Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
1 V ~ 13.2 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
R
to 50ms (see the Setting the Startup Period, RTIM sec-
tion). The default startup period is fixed at 9ms when
TIM is floating. The startup period begins after the fol-
lowing three conditions are met:
1) V
2) V
3) The device is not latched or in its autoretry delay (see
The MAX5955/MAX5956 limit the load current if an
overcurrent fault occurs during startup instead of com-
pletely turning off the external MOSFETs. The slow
comparator is disabled during the startup period and
the load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
2) Limiting the voltage across the external current-
During the startup period the gate-drive current is limit-
ed to 100µA and decreases with the increase of the
gate voltage (see the Typical Operating Characteris-
tics). This allows the controller to slowly enhance the
Low-Voltage, Dual Hot-Swap Controllers with
Independent On/Off Control
Figure 2. Startup Waveform
8
TIM
PGOOD
V
V
I
the UVLO to startup delay (37.5ms).
the Latched and Autoretry Overcurrent Fault
Management section).
MOSFET gate-charging current.
sense resistor.
LOAD
_______________________________________________________________________________________
GATE
OUT
ON
IN1
ON1
sets the duration of the startup period from 0.45s
V
R
SU,TH
SENSE
or V
and V
IN2
ON2
exceeds the UVLO threshold (2.4V) for
exceed the ON threshold (0.875V).
t
ON
V
TH
t
START
+ t
PGDLY
4.3V TO 5.8V
C
C
BOARD
BOARD
Startup Period
= LARGE
= 0
V
V
GATE
OUT
MOSFETs. If the fast comparator detects an overcur-
rent, the MAX5955/MAX5956 regulate the gate voltage
to ensure that the voltage across the sense resistor
does not exceed V
inrush current during startup. Figure 2 shows the start-
up waveforms. PGOOD_ goes high impedance 0.75ms
after the startup period if no fault condition is present.
VariableSpeed/BiLevel fault protection incorporates two
comparators with different thresholds and response
times to monitor the load current (Figure 3). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
both MOSFET gates with a strong 3mA pulldown cur-
rent in response to a fault condition. After a fault,
PGOOD_ is pulled low, the MAX5955B and MAX5956B
stay latched off and the MAX5955A and MAX5956A
automatically restart.
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
Figure 3. VariableSpeed/BiLevel Response
VariableSpeed/BiLevel Fault Protection
110µs
260ns
3ms
V
SC,TH
SU,TH
SENSE VOLTAGE (V
Slow-Comparator Startup Period
COMPARATOR
. This effectively regulates the
SLOW
IN
- V
SENSE
(4 x V
)
V
FC,TH
SC,TH
)
COMPARATOR
FAST

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