LT4256-1CS8#TR Linear Technology, LT4256-1CS8#TR Datasheet - Page 12

• Manufacturer Part Number: LT4256-1CS8#TR
• Description: IC CTRLR HOTSWAP HV LATCH 8SOIC
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LT4256-1CS8#TR

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: 10.8 V ~ 80 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Family Name: LT4256-1
• Package Type: SOIC N
• Operating Supply Voltage (min): 10.8V
• Operating Supply Voltage (max): 80V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
LT4256-1/LT4256-2
Power Good Detection
The LT4256-1/LT4256-2 includes a comparator for moni-
toring the output voltage. The output voltage is sensed
through the FB pin via an external resistor string. The
comparator’s output (PWRGD) is an open collector ca-
pable of operating from a pull-up as high as 80V.
PWRGD can be used to directly enable/disable a power
module with an active high enable input. Figure 12 shows
how to use PWRGD to control an active low enable input
power module. Signal inversion is accomplished by tran-
sistor Q2 and R10.
12
OFF SIGNAL
U
FROM MPU
GND
V
IN
U
GND
48V
V
(SHORT PIN)
Figure 11. How to Use a Logic Signal to Control LT4256 Turn-On/-Off
IN
VN2222
Q2
0.1µF
(SHORT PIN)
C3
W
0.01µF
Figure 12. Active Low Enable PWRGD Application
C3
SMAT70A
R1
64.9k
R2
8.06k
D2
SMAT70A
C2
33nF
U
R1
64.9k
R2
8.06k
1
5
D2
UV
TIMER
C2
33nF
V
1
5
CC
LT4256-1/
LT4256-2
8
100mΩ
GND
UV
TIMER
R5
4
V
SENSE
PWRGD
CC
LT4256-1/
LT4256-2
0.010Ω
8
GATE
GND
7
R5
FB
4
SENSE
PWRGD
The thresholds for the FB pin are 4.45V (low to high) and
3.99V (high to low). To calculate the PWRGD thresholds,
use the following equations:
R
20
V
GATE
6
2
3
THPWRGD
8 =
7
FB
IRF530
k
Q1
UV = 36V
PWRGD = 40V
Ω ≤
6
2
3
⎛
⎜
⎝
R7
100Ω
R9
4.02k
R6
10Ω
C1
10nF
V
IRF530
UV = 36V
PWRGD = 40V
Q1
THPWRGD
R
3 99
R7
100Ω
R6
10Ω
8
.
D1
CMPZ5241B
11V
C1
10nF
= 4.45V 1+
+
36.5k
R8
V
R
D1
CMPZ5241B
11V
9 200
≤
4256 F11
–
R4
27k
⎛
⎜
⎝
1
⎞
⎟
⎠
• R9, high to low
Q2
2N3904
R10
27k
k
R8
36.5k
R9
4.02k
R8
R9
Ω
4256 F07
PWRGD
C
⎞
⎟
⎠
L
, low to high
R4
51k
V
V
OUT
LOGIC
C
L
V
48V
4A
OUT
(8b)
(8a)
425612fa
(7)