LTC4252-2IMS8#TRPBF Linear Technology, LTC4252-2IMS8#TRPBF Datasheet - Page 19
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LTC4252-2IMS8#TRPBF
Manufacturer Part Number
LTC4252-2IMS8#TRPBF
Description
IC CNTRLR HOTSWAP NEGVOLT 8-MSOP
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheet
1.LTC4252-1CMS8PBF.pdf
(36 pages)
Specifications of LTC4252-2IMS8#TRPBF
Applications
General Purpose
Internal Switch(s)
No
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS INFORMATION
A low impedance short on one card may influence the
behavior of others sharing the same backplane. The initial
glitch and backplane sag as seen in Figure 6 Trace 1, can
rob charge from output capacitors on adjacent cards.
When the faulty card shuts down, current flows in to
refresh the capacitors. If LTC4252s are used by the other
cards, they respond by limiting the inrush current to a
value of 100mV/R
will recharge long before C
POWER GOOD, PWRGD
PWRGD latches low if GATE charges up to within 2.8V of
V
is reset in UVLO, in a UV condition or if C
to 4V. An overvoltage condition has no effect on PWRGD
status. A 58μA current pulls this pin high during reset.
Due to voltage transients between the power module and
PWRGD, optoisolation is recommended. This pin provides
sufficent drive for an optocoupler. Figure 19 shows an
alternative NPN configuration with a limiting base resistor
for the PWRGD interface. The module enable input should
have protection from the negative input current.
MOSFET SELECTION
The external MOSFET switch must have adequate safe
operating area (SOA) to handle short-circuit conditions
until TIMER times out. These considerations take prece-
dence over DC current ratings. A MOSFET with adequate
SOA for a given application can always handle the required
current, but the opposite may not be true. Consult the
manufacturer’s MOSFET data sheet for safe operating
area and effective transient thermal impedance curves.
MOSFET selection is a 3-step process by assuming the
absense of a soft-start capacitor. First, R
and then the time required to charge the load capacitance
is determined. This timing, along with the maximum
short-circuit current and maximum input voltage defines
an operating point that is checked against the MOSFET’s
SOA curve.
IN
and DRAIN pulls below V
S
. If C
T
is sized correctly, the capacitors
T
DRNL
times out.
during start-up. PWRGD
S
T
is calculated
charges up
To begin a design, first specify the required load current
and Ioad capacitance, I
rent trip point (V
the maximum load current. Note that maximum input
current to a DC/DC converter is expected at V
R
where V
the guaranteed minimum circuit breaker threshold.
During the initial charging process, the LTC4252 may oper-
ate the MOSFET in current limit, forcing (V
80mV to 120mV (V
across R
Maximum short-circuit current limit is calculated using
the maximum V
The TIMER capacitor C
slowest expected charging rate; otherwise TIMER might
time out before the load capacitor is fully charged. A value
for C
the load capacitor to charge. That time is given by:
The maximum current flowing in the DRAIN pin is given by:
S
I
I
I
R
t
is given by:
DRN(MAX)
INRUSH(MIN)
SHORTCIRCUIT(MAX)
CL(CHARGE)
S
T
LTC4252A-1/LTC4252A-2
=
is calculated based on the maximum time it takes
V
CB(MIN)
I
S
L(MAX)
CB(MIN)
. The minimum inrush current is given by:
LTC4252-1/LTC4252-2
=
V
=
= 40mV (45mV for LTC4252A) represents
=
ACL
SUPPLY(MAX)
C • V
CB
80mV
R
I
. This gives
/R
ACL
S
S
=
=
) should be set to accommodate
L
T
is 54mV to 66mV for LTC4252A)
120mV
C
and C
R
must be selected based on the
L
R
D
I
• V
INRUSH(MIN)
S
–V
SUPPLY(MAX)
L
. The circuit breaker cur-
DRNCL
ACL
SUPPLY(MIN)
) between
19
425212fc
(10)
(11)
(12)
(8)
(9)
.