LTC4252A-1CMS Linear Technology, LTC4252A-1CMS Datasheet - Page 29

IC CTRLR HOTSWAP NEG VOLT 10MSOP

LTC4252A-1CMS

Manufacturer Part Number
LTC4252A-1CMS
Description
IC CTRLR HOTSWAP NEG VOLT 10MSOP
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheets

Specifications of LTC4252A-1CMS

Applications
General Purpose
Internal Switch(s)
No
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
Family Name
LTC4252A-1
Package Type
MSOP
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Product Depth (mm)
3mm
Product Height (mm)
0.86mm
Product Length (mm)
3mm
Mounting
Surface Mount
Pin Count
10
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC4252A-1CMS
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC4252A-1CMS#TRPBF
Manufacturer:
LINEAR
Quantity:
7 752
APPLICATIO S I FOR ATIO
current begins to decline below V
loop shuts off and GATE releases at time point 8. At time
point 9, the SENSE voltage falls below V
deactivates.
Large values of C
time out as V
the circuit breaker delay. The load capacitor is unable to
achieve full charge in one GATE start-up cycle. A more
serious side effect of large C
be exceeded during soft-start into a low impedance load.
A soft-start voltage below V
breaker TIMER.
Power Limit Circuit Breaker
Figure 19 shows the LTC4252A-1 in a power limit circuit
breaking application. The SENSE pin is modulated by the
board supply voltage, V
to be the same as the low supply operating voltage,
V
operating voltage, V
power at V
selected using the ratio:
SUPPLY(MIN)
SUPPLY(MIN)
ACL
= 43V. If the goal is to have the high supply
PWRGD
(t) may exceed the V
SENSE
TIMER
DRAIN
SS
GATE
U
20 • (V
SS
can cause premature circuit breaker
SUPPLY(MAX)
V
END OF INTIAL TIMING CYCLE
(18a) Without External C
12 34 567
GS(th)
SUPPLY
, then resistors R4 and R6 are
ACL
V
V
U
TMRH
TMRL
+ V
58µA
SS
20 • V
CB
OS
Figure 18. Soft-Start Timing (All Waveforms are Referenced to V
. The zener voltage, V
)
values is SOA duration may
230µA + 8 • I
will not activate the circuit
20 • (V
OS
7a
ACL
= 71V giving the same
CB
W
(t). The current limit
+ V
CB
DRN
OS
potential during
)
8 9
CB
58µA
SS
V
V
V
and TIMER
10
ACL
CB
DRNCL
5.8µA
V
U
DRNL
11
V
IN
Z
is set
– V
GATEH
PWRGD
TIMER
SENSE
DRAIN
If R6 is 27Ω, R4 is 38.3k. The peak circuit breaker power
limit is:
when
The peak power at the fault current limit occurs at the
supply overvoltage threshold. The fault current limited
power is:
GATE
POWER
SS
V
V
POWER
R
R
SUPPLY
SUPPLY
V
END OF INTIAL TIMING CYCLE
6
4
R
12 3 4 5 6
GS(th)
LTC4252A-1/LTC4252A-2
(18b) With External C
S
=
V
V
TMRH
TMRL
V
FAULT
58µA
SUPPLY MAX
MAX
20 • V
= 0.5 • (V
20 • (V
LTC4252-1/LTC4252-2
230µA + 8 • I
V
V
OS
ACL
CB
=
=
ACL
=
(
1 064
(
7
4
+ V
POWER
V
.
SUPPLY MIN
SUPPLY(MIN)
OS
DRN
(
V
)
V
)
SUPPLY MIN
SUPPLY
8 9
EE
SS
20 • (V
POWER
58µA
)
V
V
V
SUPPLY MIN
(
10
ACL
CB
DRNCL
4252-1/2 F18
5.8µA
V
DRNL
CB
(
11
V
+ V
)
IN
+
+ V
V
OS
– V
SUPPLY MIN
)
(
Z
V
)
GATEH
)
SUPPLY MAX
SUPPLY(MAX)
V
SUPPLY MAX
)
R
R
6
4
(
(
)
(
)
) = 57V.
29
)
2
)
425212fb
(16)
(17)
(18)

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