LM5069MM-2/NOPB National Semiconductor, LM5069MM-2/NOPB Datasheet - Page 11
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LM5069MM-2/NOPB
Manufacturer Part Number
LM5069MM-2/NOPB
Description
IC CTRLR HOT SWAP 48V 10-MSOP
Manufacturer
National Semiconductor
Type
Hot-Swap Controllerr
Datasheet
1.LM5069MMX-1NOPB.pdf
(22 pages)
Specifications of LM5069MM-2/NOPB
Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
9 V ~ 80 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
For Use With
LM5069EVAL - BOARD EVALUATION LM5069
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM5069MM-2
LM5069MM-2TR
LM5069MM-2TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM5069MM-2/NOPB
Manufacturer:
TI/德州仪器
Quantity:
20 000
Current Limit
The current limit threshold is reached when the voltage across
the sense resistor R
current limiting condition, the GATE voltage is controlled to
limit the current in MOSFET Q1. While the current limit circuit
is active, the fault timer is active as described in the Fault
Timer & Restart section. If the load current falls below the
current limit threshold before the end of the Fault Timeout
Period, the LM5069 resumes normal operation. For proper
operation, the R
mΩ.
Circuit Breaker
If the load current increases rapidly (e.g., the load is short-
circuited) the current in the sense resistor (R
the current limit threshold before the current limit control loop
is able to respond. If the current exceeds twice the current
limit threshold (105 mV/R
230 mA pull-down current at the GATE pin, and a Fault Time-
out Period begins. When the voltage across R
105 mV the 230 mA pull-down current at the GATE pin is
switched off, and the gate voltage of Q1 is then determined
by the current limit or the power limit functions. If the TIMER
pin reaches 4.0V before the current limiting or power limiting
condition ceases, Q1 is switched off by the 2 mA pull-down
current at the GATE pin as described in the Fault Timer &
Restart section.
Power Limit
An important feature of the LM5069 is the MOSFET power
limiting. The Power Limit function can be used to maintain the
maximum power dissipation of MOSFET Q1 within the device
SOA rating. The LM5069 determines the power dissipation in
S
resistor value should be no larger than 100
S
(VIN to SENSE) reaches 55 mV. In the
S
), Q1 is quickly switched off by the
S
) may exceed
S
falls below
FIGURE 4. Gate Control
11
Q1 by monitoring its drain-source voltage (SENSE to OUT),
and the drain current through the sense resistor (VIN to
SENSE). The product of the current and voltage is compared
to the power limit threshold programmed by the resistor at the
PWR pin. If the power dissipation reaches the limiting thresh-
old, the GATE voltage is modulated to reduce the current in
Q1. While the power limiting circuit is active, the fault timer is
active as described in the Fault Timer & Restart section.
Fault Timer & Restart
When the current limit or power limit threshold is reached
during turn-on or as a result of a fault condition, the gate-to-
source voltage of Q1 is modulated to regulate the load current
and power dissipation. When either limiting function is acti-
vated, an 85 µA fault timer current source charges the exter-
nal capacitor (C
(Fault Timeout Period). If the fault condition subsides during
the Fault Timeout Period before the TIMER pin reaches 4.0V,
the LM5069 returns to the normal operating mode and C
discharged by the 2.5 µA current sink. If the TIMER pin reach-
es 4.0V during the Fault Timeout Period, Q1 is switched off
by a 2 mA pull-down current at the GATE pin. The subsequent
restart procedure then depends on which version of the
LM5069 is in use.
The LM5069-1 latches the GATE pin low at the end of the
Fault Timeout Period. C
2.5 µA fault current sink. The GATE pin is held low by the 2
mA pull-down current until a power up sequence is externally
initiated by cycling the input voltage (V
pulling the UVLO pin below 2.5V with an open-collector or
open-drain device as shown in Figure 5. The voltage at the
TIMER pin must be <0.3V for the restart procedure to be ef-
fective.
T
) at the TIMER pin as shown in Figure 6
20197214
T
is then discharged to ground by the
SYS
), or momentarily
www.national.com
T
is