MIC2591B-2BTQ TR Micrel Inc, MIC2591B-2BTQ TR Datasheet - Page 28
![IC PCI HOT PLUG CTLR DUAL 48TQFP](/photos/6/84/68454/576-48-tqfp_sml.jpg)
MIC2591B-2BTQ TR
Manufacturer Part Number
MIC2591B-2BTQ TR
Description
IC PCI HOT PLUG CTLR DUAL 48TQFP
Manufacturer
Micrel Inc
Type
Hot-Swap Controllerr
Datasheet
1.MIC2591B-2YTQ.pdf
(34 pages)
Specifications of MIC2591B-2BTQ TR
Applications
General Purpose, PCI Express
Internal Switch(s)
No
Voltage - Supply
3.3V, 12V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
MIC2591B-2BTQTR
MIC2591B-2BTQTR
MIC2591B-2BTQTR
Status Register Slot B (STATB)
8-Bits, Read-Only
The power-up default value is 00
overcurrent fault condition, writing a logical 1 back into the active (or set) bit position will clear the bit and deassert /INT. The
status of the /FAULTB pin is not affected by reading the Status Register or by clearing active status bits.
Notes:
1.
2.
3:.
March 2005
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
VAUXBF
VAUXBF
VAUXBF
VAUXBF
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
FAULTB
VAUXB
VAUXB
VAUXB
VAUXB
MAINB
MAINB
MAINB
MAINB
12VBF
12VBF
12VBF
12VBF
If FAULTB has been set by an overcurrent condition on one or more of the MAIN outputs, the ONB input must go LOW to reset FAULTB.
If FAULTB has been set by a VAUXB overcurrent event, the AUXENB input must go LOW to reset FAULTB.
If an overcurrent has occurred on both a MAIN output and the VAUX output of slot B, both ONB and AUXENB of the slot must go low to reset
FAULTB.
Neither the FAULTB bits nor the /FAULTB pins are active when the MIC2591B power paths are controlled by the System Management Interface.
When using SMI power path control, the AUXENB and ONB pins for that slot must be tied to GND.
If /FORCE_ONB is asserted (low), the /FAULTB pin will be unconditionally forced to its open-drain state. Note, though, that the value in the FAULTB
register bit is not affected by /FORCE_ONB, but will instead continue to read as a high if no faults are present on Slot B, and as a low if any fault
conditions exist which would disable Slot B if /FORCE_ONB was not asserted.
Bit(s)
Bit(s)
Bit(s)
3VBF
3VBF
3VBF
3VBF
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[3]
D[3]
D[3]
D[3]
D[1]
D[1]
D[1]
D[1]
Power-Up Default Value:
Command_Byte Value (R/W):
FAULT Pin Status - Slot B
FAULT Pin Status - Slot B
FAULT Pin Status - Slot B
FAULT Pin Status - Slot B
MAIN Enable Status - Slot B
MAIN Enable Status - Slot B
MAIN Enable Status - Slot B
MAIN Enable Status - Slot B
VAUX Enable Status - Slot B
VAUX Enable Status - Slot B
VAUX Enable Status - Slot B
VAUX Enable Status - Slot B
Overcurrent Fault: VAUXB supply
Overcurrent Fault: VAUXB supply
Overcurrent Fault: VAUXB supply
Overcurrent Fault: VAUXB supply
Reserved
Reserved
Reserved
Reserved
Overcurrent Fault: +12V supply
Overcurrent Fault: +12V supply
Overcurrent Fault: +12V supply
Overcurrent Fault: +12V supply
Reserved
Reserved
Reserved
Reserved
Overcurrent Fault: 3.3V supply
Overcurrent Fault: 3.3V supply
Overcurrent Fault: 3.3V supply
Overcurrent Fault: 3.3V supply
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
h
. Both slots are disabled upon power-up, i.e., all supply outputs are off. In response to an
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
Function
Function
Function
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
Status Register, Slot B (STATB)
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
VAUXBF
VAUXBF
VAUXBF
VAUXBF
VAUXBF
VAUXBF
VAUXBF
VAUXBF
VAUXBF
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
0000 0000
0000 0101
28
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
b
b
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
= 00
= 05
h
h
1 = Fault pin asserted
1 = Fault pin asserted
1 = Fault pin asserted
1 = Fault pin asserted
(/FAULTB pin is LOW)
(/FAULTB pin is LOW)
(/FAULTB pin is LOW)
(/FAULTB pin is LOW)
0 = Fault pin deasserted
0 = Fault pin deasserted
0 = Fault pin deasserted
0 = Fault pin deasserted
(/FAULTB pin is HIGH)
(/FAULTB pin is HIGH)
(/FAULTB pin is HIGH)
(/FAULTB pin is HIGH)
See Notes 1, 2, and 3.
See Notes 1, 2, and 3.
See Notes 1, 2, and 3.
See Notes 1, 2, and 3.
Represents the actual state (on/off) of the
Represents the actual state (on/off) of the
Represents the actual state (on/off) of the
Represents the actual state (on/off) of the
four Main Power outputs for Slot B
four Main Power outputs for Slot B
four Main Power outputs for Slot B
four Main Power outputs for Slot B
(+12V and +3.3V)
(+12V and +3.3V)
(+12V and +3.3V)
(+12V and +3.3V)
1 = MAIN Power ON
1 = MAIN Power ON
1 = MAIN Power ON
1 = MAIN Power ON
0 = MAIN Power OFF
0 = MAIN Power OFF
0 = MAIN Power OFF
0 = MAIN Power OFF
Represents the actual state (on/off) of the
Represents the actual state (on/off) of the
Represents the actual state (on/off) of the
Represents the actual state (on/off) of the
Auxiliary Power output for Slot B
Auxiliary Power output for Slot B
Auxiliary Power output for Slot B
Auxiliary Power output for Slot B
1 = AUX Power ON
1 = AUX Power ON
1 = AUX Power ON
1 = AUX Power ON
0 = AUX Power OFF
0 = AUX Power OFF
0 = AUX Power OFF
0 = AUX Power OFF
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
Always read as zero
Always read as zero
Always read as zero
Always read as zero
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
Always read as zero
Always read as zero
Always read as zero
Always read as zero
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
12VBF
12VBF
12VBF
12VBF
12VBF
12VBF
12VBF
12VBF
12VBF
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
Operation
Operation
Operation
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
D[1]
D[1]
D[1]
D[1]
D[1]
D[1]
D[1]
D[1]
D[1]
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
M9999-033105
3VBF
3VBF
3VBF
3VBF
3VBF
3VBF
3VBF
3VBF
3VBF
D[0]
D[0]
D[0]
D[0]
D[0]
D[0]
D[0]
D[0]
D[0]