DS1862AB+ Maxim Integrated Products, DS1862AB+ Datasheet - Page 31

• Manufacturer Part Number: DS1862AB+
• Description: IC LASR CTRLR 7CHAN 5.5V 25CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Laser Diode Controller (Fiber Optic)r

Specifications of DS1862AB+

• Data Rate: 10Gbps
• Number Of Channels: 7
• Voltage - Supply: 2.9 V ~ 5.5 V
• Current - Supply: 3mA
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 25-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6Fh
74h
76h
77h → 7Ah
7Bh → 7Eh
7Fh
Table 01h
80h → DBh
DCh
Bit 0: Reserved.
Bit 1: Reserved.
Bit 2: Reserved.
Bit 3: RX-CDR-NL not locked. Indicates LOL in Rx path CDR.
Bit 4: RX-NR State. Indicates a NOT READY condition in the Rx path.
Bit 5: Reserved.
Bit 6: TX-F State. Indicates a laser safety fault condition.
Bit 7: TX-NR State. Indicates a NOT READY condition on the Tx path.
Bit 0: DATA-NR. Bit is high until DS1862A has achieved power-up. Bit goes low, signaling that monitor channel
Bit 1: RX-LOS. Indicates optical loss of the signal and is updated within t
Bit 2: INTERRUPT. Indicates the state of the INTERRUPT pin and is updated within t
Bit 3: SOFT P-DOWN/RST. Read/Write bit that places the DS1862A in power-down mode. Toggle to reset. Masked
Bit 4: P-DOWN/RST. Indicates the digital state of the P-DOWN/RST pin and is updated within t
Bit 5: MOD-NR State. Indicates the state of MOD-NR pin and is updated within t
Bit 6: SOFT TX-D. Read/Write bit that disables (shuts down) I
Bit 7: TX-D. Indicates the digital state of the TX-D pin and is updated within t
• GCS0 ...............................<R-all/W-all><Status><xx> These are nonlatched flags, indicating the real-time dig-
• POA ..................................<R-all/W-all><Volatile><00> A high on bit 7 indicates that V
• PEC_EN ..............................<R-all/W-all><Volatile><00> Bit 0 is used to enable PEC. A value of 1 enables PEC.
• Host PW Change .............<R-never/W-Host><Shadowed Nonvolatile P><00> This is the 32-bit location that
• PWE .....................................<R-never/W-all><Volatile><00> This is the 32-bit location that is used to enter the host
• Table Select .....................<R-all/W-all><Volatile><01> This is the 8-bit register that controls which section of
• USER EE ..........................<R-all/W-Module><Nonvolatile><00>
• V
CC2/3
data is ready to be read.
by Bit 5 of Byte DDh in Table 01h.
XFP Laser Control and Digital Diagnostic IC
_ SEL ......................<R-all/W-Module><Shadowed Nonvolatile><00> Bit 0 of this register controls
______________________________________________________________________________________
ital state of a corresponding signal.
on analog trip point, POA.
the DS1862A uses to compare with the PWE to grant host password access. A Read
result is always <FFh>.
and module password to gain access to the DS1862A. A Read result is always <FFh>.
upper memory (table) is being addressed by I
addressing Table 01h. Values above 05h are accepted, but do not correspond to
any physical memory.
whether V
selects V
CC2
CC2
to be measured.
or V
CC3
is internally measured by the V
BIASSET
and I
MODSET
LOS-ON
. Masked by Bit 6 of Byte DDh in Table 01h.
OFF
2
C. A value of 00h and 01h results in
PDR-ON
.
.
INIT_ON
CC2/3
.
CC3
.
monitor channel. A ‘1’
PDR-ON
is below the power-
.
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