MAX3799ETJ+T Maxim Integrated Products, MAX3799ETJ+T Datasheet - Page 28

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MAX3799ETJ+T

Manufacturer Part Number
MAX3799ETJ+T
Description
IC AMP LIMITING VCSEL DVR 32TQFN
Manufacturer
Maxim Integrated Products
Type
Laser Diode Driverr
Datasheet

Specifications of MAX3799ETJ+T

Data Rate
14Gbps
Number Of Channels
1
Voltage - Supply
2.85 V ~ 3.63 V
Current - Supply
97mA
Current - Modulation
12mA
Current - Bias
15mA
Operating Temperature
-40°C ~ 85°C
Package / Case
32-WFQFN Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1Gbps to 14Gbps, SFP+ Multirate Limiting
Amplifier and VCSEL Driver
impromptu deemphasis adjustment, it is recommended
that the DE_INC (MODINC[5]) bit is used. Use of this bit
increments or decrements the deemphasis code setting
by 1 LSB based on the sign of increment in the
MODINC[4:0] and, hence, the SET_IMOD[8:0] setting.
This helps maintain the BER while having the flexibility to
improve signal quality by adjusting deemphasis while
the transmit operation continues. This feature enables
glitchless deemphasis adjustment while maintaining
excellent BER performance.
The RXDE_EN bit must be set to 1 to enable the deem-
phasis function. Deemphasis decreases the output
amplitude at ROUT+/ROUT- by 25%. To maintain the
same output amplitude as before the activation of
deemphasis, the SET_CML register value needs to be
increased by 25%. When deemphasis is enabled, the
limiting amplifier AC performance is guaranteed up to
800mV
ister can be set from 0 to 255 bits, but it is important to
note that performance is guaranteed up to 215 bits.
The eye crossing at the Tx output can be adjusted using
the SET_PWCTRL register. Table 6 shows these settings.
The sign of the number specifies the direction of pulse-
width distortion. The code of 1111 corresponds to a
balanced state for differential output. The pulse-width
distortion is bidirectional around the balanced state
(see the Typical Operating Characteristics section).
Amplitude of the CML output stage is controlled by an
8-bit DAC register (SET_CML). The differential output
amplitude is up to 1000mV
(assuming an ideal 100Ω differential load). The guaran-
teed output CML DAC range is up to 215.
For AC-coupling, the coupling capacitors C
C
deterministic jitter. Jitter is decreased as the input low-
frequency cutoff (f
The recommended C
MAX3799.
The capacitor between CAZ1 and CAZ2 determines the
time constant of the signal path DC-offset cancellation
loop. To maintain stability, it is important to keep at
28
Output Voltage R
OUT
Activating Receiver Output Deemphasis
______________________________________________________________________________________
Select the Offset-Correction Capacitor
should be selected to minimize the receiver’s
P-P
typical output amplitude. The SET_CML reg-
Programming CML Output Settings
Programming Pulse-Width Control
Select the Coupling Capacitor
f
OUT
IN
IN
) is decreased.
= 1/[2π(50)(C
(mV
IN
and C
P-P
P-P
) = 40 + 4.55 (SET_CML)
with 4.6mV
OUT
IN
)]
is 0.1μF for the
P-P
resolution
IN
and
least a one-decade separation between f
low-frequency cutoff (f
set cancellation circuit. A 1nF capacitor between CAZ1
and CAZ2 is recommended for the MAX3799.
To minimize inductance, keep the connections between
the MAX3799 output pins and laser diode as close as
possible. Optimize the laser diode performance by
placing a bypass capacitor as close as possible to the
laser anode. Use good high-frequency layout tech-
niques and multiple-layer boards with uninterrupted
ground planes to minimize EMI and crosstalk.
The exposed pad on the 32-pin TQFN provides a very
low-thermal resistance path for heat removal from the IC.
The pad is also electrical ground on the MAX3799 and
must be soldered to the circuit board ground for proper
thermal and electrical performance. Refer to Application
Note 862: HFAN-08.1: Thermal Considerations of QFN
and Other Exposed-Paddle Packages for additional
information.
Using the MAX3799 laser driver alone does not ensure
that a transmitter design is compliant with IEC 825. The
entire transmitter circuit and component selections
must be considered. Each user must determine the
level of fault tolerance required by the application, rec-
ognizing that Maxim products are neither designed nor
authorized for use as components in systems intended
for surgical implant into the body, for applications
intended to support or sustain life, or for any other
application in which the failure of a Maxim product
could create a situation where personal injury or death
could occur.
Table 6. Eye-Crossing Settings for
SET_PWCTRL
SET_PWCTRL[3:0]
1000
1001
1010
1011
1100
1101
1110
1111
Applications Information
PWD
OC
Laser Safety and IEC 825
-7
-6
-5
-4
-3
-2
-1
0
) associated with the DC-off-
Layout Considerations
Exposed-Pad Package
SET_PWCTRL[3:0]
0111
0110
0101
0100
0011
0010
0001
0000
IN
and the
PWD
8
7
6
5
4
3
2
1

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