AD9661AKR Analog Devices Inc, AD9661AKR Datasheet - Page 8

• Manufacturer Part Number: AD9661AKR
• Description: IC LASER DIODE DRIVER 28-SOIC
• Manufacturer: Analog Devices Inc
• Type: Laser Diode Driverr

Specifications of AD9661AKR

• Rohs Status: RoHS non-compliant
• Number Of Channels: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Mounting Type: Surface Mount

AD9661A
Minimizing the Impedance of the Output Current Path
Because of the very high current slew that the AD9661A is
capable of producing (120+ mA in 1.5 ns), the inductance of
the output current path to and from the laser diode is critical.
A good layout of the output current path will yield high quality
light pulses with rise times of about 1.5 ns and less than 5%
overshoot. A poor layout can result in significant overshoot and
ringing. The most important guideline for the layout is to mini-
mize the impedance (mostly inductance) of the output current
path to the laser.
It is important to recognize that the laser current path is a
closed loop. The figure illustrates the path that current travels:
(1) from the +V
cathode (2) from the cathode to the output pins of the
AD9661A (3) through the output drive circuit of the
AD9661A, (4) through the return path (GROUND plane in the
illustration) (5) through the bypass capacitors back to the +V
connection of the laser diode. The inductance of this loop can
be minimized by placing the laser as close to the AD9661A as
possible to keep the loop short, and by placing the send and re-
turn paths on adjacent layers of the PC board to take advantage
of mutual coupling of the path inductances. This mutual cou-
pling effect is the most important factor in reducing inductance
in the current path.
The trace from the output pins of the AD9661A to the cathode
of the laser should be several millimeters wide and should be as
direct as possible. The return current will choose the path of
least resistance. If the return path is the GROUND plane, it
should have an unbroken path, under the output trace, from the
laser anode back to a the AD9661A. If the return path is not
the ground plane (such as on a two layer board, or on the +V
plane), it should still be on the board plane adjacent to the
plane of the output trace. If the current cannot return along a
path that follows the output trace, the inductance will be drasti-
cally increased and performance will be degraded.
S
connection at the anode of the laser to the
AD9661A
CONNECTIONS
CONNECTIONS
OUTPUT PIN
GROUND PIN
3
Figure 6. Laser Diode Current Loop
S
S
–8–
19
26
25
24
23
22
21
20
PIN ASSIGNMENTS
Optimizing the Feedback Layout
In applications where the dynamic performance of the analog
feedback loop is important, it is necessary to optimize the layout
of the gain resistor, R
SENSE IN. Such applications include systems which recali-
brate the write loop on pulses as short as 25 ns, and closed-loop
applications.
The best possible TZA settling will be achieved by using a single
carbon surface mount resistor (usually 5% tolerance) for R
and small surface mount capacitor for C
GAIN pin (Pin 5) is essentially connected to the inverting input
of the TZA, it is very sensitive to stray capacitance. R
should be placed between Pin 5 and Pin 6, as close as possible
to Pin 5. Small traces should be used, and the ground and +V
planes adjacent to the trace should be removed to further mini-
mize stray capacitance.
The trace from SENSE IN to the anode of the PIN photodetec-
tor should be thin and routed away from the laser cathode trace.
Example Calculations
The example below (in addition to the one included in the sec-
tions above) should guide users in choosing R
hold capacitor values, and worst case calibration times.
System Requirements:
• Laser power: 4 mW
• Hold Time: 0.5 ms
Laser diode/photo diode characteristics:
• Laser efficiency 0.3 mW/mA
• Monitor current : 0.2 mA/mW
• From the laser power requirements and efficiency we can
estimate:
PATH SEGMENTS (See Text)
I
2
LASER DIODE CURRENT
OUT MAX
REDUCES INDUCTANCE
MUTUAL COUPLING
4 mW
4
GAIN
2%
, as well as the monitor current path to
(2.0%)/ 0.3
BYPASS CAPS
GROUND PLANE
1
+V
S
PLANE
GAIN
mW
mA
. Because the
5
GAIN
266.6 A.
, C
GAIN
GAIN
REV. 0
, the
GAIN
S