MAX6974ATL+ Maxim Integrated Products, MAX6974ATL+ Datasheet - Page 18

• Manufacturer Part Number: MAX6974ATL+
• Description: IC LED DRIVER LINEAR 40-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Linear (Serial Interface)r

Specifications of MAX6974ATL+

• Topology: PWM
• Number Of Outputs: 24
• Internal Driver: Yes
• Type - Primary: General Purpose
• Type - Secondary: RGB
• Frequency: 33MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Voltage - Output: 7V
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Operating Temperature: -40°C ~ 125°C
• Current - Output / Channel: 30mA
• Internal Switch(s): Yes
• Low Level Output Current: 6 mA
• High Level Output Current: 30 mA
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Supply Current: 77 mA
• Maximum Power Dissipation: 2963 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Efficiency: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The bit length of the data segment received by the
MAX6974/MAX6975 is dependent on the command
specified in the header.
The load CALDAC command has three unique data
bytes, while load global-intensity PDM and load
configuration each have one byte of data repeated
three times. The CALDAC data within the command
load CALDAC is sent with B CALDAC data first, fol-
lowed by G CALDAC data, and then R CALDAC data,
as shown in Table 8.
The data segment of the load individual PWM command
has a variable length depending on specific device and
configuration settings. The data is always organized
24-Output PWM LED Drivers
for Message Boards
Table 8. Serial Format for Load CALDAC
B[7:0]
G[7:0]
R[7:0]
N
Table 9. Serial Format for Load Global-Intensity PDM
D[7:0]
Table 10. Serial Format for Load Configuration
D[7:0]
Table 11. Serial Format for Load Individual PWM (Nonmultiplexed)
B_…G_…R_
Table 12. Serial Format for Load Individual PWM (Multiplexed)
B_
B_'
G_
G_'
R_
R_'
18
______________________________________________________________________________________
HDR[23:0]
HDR[23:0]
HDR[23:0]
HDR[23:0]
HDR[23:0]
HEADER
HEADER
HEADER
HEADER
HEADER
8-bit data loaded into port B CALDAC
8-bit data loaded into port G CALDAC
8-bit data loaded into port R CALDAC
Number of cascaded devices
Send the 8-bit data for the global-intensity PDM three times (24 total bits)
Send the 8-bit configuration data three times (24 total bits)
12-bit (MAX6974) or 14-bit (MAX6975) PWM data for each output B_ during multiplex phase MUX0, MSB first
12-bit (MAX6974) or 14-bit (MAX6975) PWM data for each output B_ during multiplex phase MUX1, MSB first
12-bit (MAX6974) or 14-bit (MAX6975) PWM data for each output G_ during multiplex phase MUX0, MSB first
12-bit (MAX6974) or 14-bit (MAX6975) PWM data for each output G_ during multiplex phase MUX1, MSB first
12-bit (MAX6974) or 14-bit (MAX6975) PWM data for each output R_ during multiplex phase MUX0, MSB first
12-bit (MAX6974) or 14-bit (MAX6975) PWM data for each output R_ during multiplex phase MUX1, MSB first
12-bit (MAX6974) or 14-bit (MAX6975) data each
B7, B7', B6, B6', …R0'
B[7:0] G[7:0] R[7:0]
D[7:0] D[7:0] D[7:0]
D[7:0] D[7:0] D[7:0]
B7, B6, …R0
DATA 1
DATA 1
DATA 1
DATA 1
DATA 1
Data Segment
B7, B7', B6, B6', …R0'
B[7:0] G[7:0] R[7:0]
D[7:0] D[7:0] D[7:0]
D[7:0] D[7:0] D[7:0]
B7, B6, …R0
DATA 2
DATA 2
DATA 2
DATA 2
DATA 2
as B driver data first in the order of B7 first to B0 last
(MSB first), followed by the G driver data in the same
order of G7 to G0 (MSB first), and then the R driver data
in the order of R7 to R0 (MSB first).
The MAX6974/MAX6975 allow for an optional string of
data bits to be transmitted following all device data
bits, which is referred to as the tail segment. The data
bits of the tail segment are clocked back to the host,
following the header, from the last device in a cascaded
chain. The number of bits in the tail segment is optional.
The tail carries no device-specific data on DIN, but
provides feedback confirmation to the host that all data
bits were extracted by all devices in the cascade chain.
B7, B7', B6, B6', …R0'
B[7:0] G[7:0] R[7:0]
D[7:0] D[7:0] D[7:0]
D[7:0] D[7:0] D[7:0]
B7, B6, …R0
DATA 3
DATA 3
DATA 3
DATA 3
DATA 3
…
…
…
…
…
…
…
…
…
…
B7, B7', B6, B6', …R0'
B[7:0] G[7:0] R[7:0]
D[7:0] D[7:0] D[7:0]
D[7:0] D[7:0] D[7:0]
Tail Segment
DATA N
DATA N
DATA N
DATA N
DATA N
B7…R0