IR11672ASPBF International Rectifier, IR11672ASPBF Datasheet - Page 12

• Manufacturer Part Number: IR11672ASPBF
• Description: IC MOSFET DRIVER 200V 8-SOIC
• Manufacturer: International Rectifier
• Series: Advanced Smart Rectifier™r

Specifications of IR11672ASPBF

• Configuration: Half Bridge
• Input Type: Non-Inverting
• Delay Time: 60ns
• Current - Peak: 2A
• Number Of Configurations: 1
• Number Of Outputs: 2
• Voltage - Supply: 11.4 V ~ 18 V
• Operating Temperature: -25°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: *
• Part Status: Active and Preferred
• Package: 8-Pin SOIC(NB)
• Circuit: Switching Regulator Controller
• Topology: Flyback / Resonant Half-Bridge
• Current Mode: Discontinuous / Critical
• Vcc (min): 11.4
• Vcc (max): 18
• Vout (max): 200
• Iout (a): +2 / -7
• Switch Freq (khz): up to 500kHz
• Vgate Clamp (v): 10.7
• Programmability: MOT / OVT
• Enable Pin: Yes
• Isleep (ua): 200
• Automatic Mot Protection: Yes
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / Rohs Status: RoHS Compliant part

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Application Information and Additional Details
UVLO/Sleep Mode
The IC remains in the UVLO condition until the voltage on the VCC pin exceeds the VCC turn on threshold
voltage, V
draws a quiescent current of I
whenever the IC supply voltage condition of VCC < V
The sleep mode is initiated by pulling the EN pin below 1.6V (typ). In this mode the IC is essentially shut
down and draws a very low quiescent supply current.
Normal Mode and Synchronized Enable Function
The IC enters in normal operating mode once the UVLO voltage has been exceeded and the EN voltage is
above V
disabled (stays low) until V
enabled in the middle of a switching cycle. This logic prevents any reverse currents across the device due to
the minimum on time function in the IC. The gate will continuously drive the SR MOSFET after this one-time
activation. The Cycle by Cycle MOT protection circuit is enabled in Normal Mode.
output is disabled. This function can avoid reverse current that occurs when the system works at very low
duty-cycles or at very light/no load conditions and reduce system standby power consumption by disabling
GATE outputs. The Cycle by Cycle MOT Check circuit is always activated under Normal Mode and MOT
Protection Mode, so that the IC can automatically resume normal operation once the load increases to a level
and the secondary current conduction time is longer than MOT.
State Diagram
MOT Protection Mode
If the secondary current conduction time is shorter than the MOT (Minimum On Time) setting, the next driver
ENHI
CC ON
threshold. When the IC enters the Normal Mode from the UVLO Mode, the GATE output is
. During the time the IC remains in the UVLO state, the gate drive circuit is inactive and the IC
DS
exceeds V
CC START
. The UVLO mode is accessible from any other state of operation
TH3
to activate the gate. This ensures that the GATE output is not
12
CC UVLO
occurs.
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IR11672AS