LTC1154CN8 Linear Technology, LTC1154CN8 Datasheet - Page 9

IC MOSFET DRIVER HIGH-SIDE 8-DIP

LTC1154CN8

Manufacturer Part Number
LTC1154CN8
Description
IC MOSFET DRIVER HIGH-SIDE 8-DIP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1154CN8

Configuration
High-Side
Input Type
Inverting
Delay Time
160µs
Number Of Configurations
1
Number Of Outputs
1
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Peak
-
High Side Voltage - Max (bootstrap)
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1154CN8
Manufacturer:
LT
Quantity:
5 510
Part Number:
LTC1154CN8
Manufacturer:
SHARP
Quantity:
5 510
APPLICATIONS INFORMATION
Capacitive Loads
Large capacitive loads, such as complex electrical systems
with large bypass capacitors, should be powered using
the circuit shown in Figure 3. The gate drive to the power
MOSFET is passed through an RC delay network, R1 and
C1, which greatly reduces the turn-on ramp rate of the
switch. And since the MOSFET source voltage follows the
gate voltage, the load is powered smoothly and slowly from
ground. This dramatically reduces the start-up current
fl owing into the supply capacitor(s) which, in turn, reduces
supply transients and allows for slower activation of sensi-
tive electrical loads. (Diode, D1, provides a direct path for
the LTC1154 protection circuitry to quickly discharge the
gate in the event of an overcurrent condition).
The RC network, R
input should be set to trip based on the expected character-
istics of the load after start-up. With this circuit, it is possible
to power a large capacitive load and still react quickly to
an overcurrent condition. The ramp rate at the output of
the switch as it lifts off ground is approximately:
And therefore the current fl owing into the capacitor during
start-up is approximately:
Using the values shown in Figure 3, the start-up current
is less than 100mA and does not false-trigger the drain
sense circuitry which is set at 2.7A with a 1ms delay.
dV/dt = (V
I
START-UP
IN
EN
STATUS
GND
Figure 3. Powering Large Capacitive Loads
LTC1154
= C
GATE
LOAD
– V
12V
D
DS
SD
V
G
S
and C
• dV/dt
TH
)/(R1 • C1)
D
100k
C
0.01μF
R1
, in series with the drain sense
D
1N4148
D1
+
C1
0.33μF
100k
R2
470μF
100k
R
D
15V
+
MTP3055E
0.036Ω
OUT
C
100μF
LTC1154 • F03
LOAD
Lamp Loads
The inrush current created by a lamp during turn-on can be
10 to 20 times greater than the rated operating current. The
circuit shown in Figure 4 shifts the current limit threshold
up by a factor of 11:1 (to 30A) for 100ms when the bulb
is fi rst turned on. The current limit then drops down to
2.7A after the inrush current has subsided.
Selecting R
Figure 5 is a graph of normalized overcurrent shutdown
time versus normalized MOSFET current. This graph is
used to select the two delay components, R
which make up a simple RC delay between the drain sense
resistor and the drain sense input.
Figure 5. Overcurrent Shutdown Time vs MOSFET Current
IN
EN
STATUS
GND
Figure 4. Lamp Driver with Delayed Protection
0.01
D
LTC1154
0.1
10
1
and C
1
MOSFET CURRENT (1 = SET CURRENT)
12V
DS
SD
D
V
G
S
10k
10
100k
1M
+
VN2222LL
9.1V
470μF
LTC1154
LTC1154 • F05
0.1μF
100
MTP3055EL
D
0.036Ω
12V/1A
BULB
LTC1154 • F04
and C
1154fb
9
D
,

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