LTC1693-5CMS8#PBF Linear Technology, LTC1693-5CMS8#PBF Datasheet - Page 7
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LTC1693-5CMS8#PBF
Manufacturer Part Number
LTC1693-5CMS8#PBF
Description
IC MOSFET DVR P-CH SINGLE 8-MSOP
Manufacturer
Linear Technology
Datasheet
1.LTC1693-5CMS8.pdf
(8 pages)
Specifications of LTC1693-5CMS8#PBF
Configuration
High-Side
Input Type
Inverting and Non-Inverting
Delay Time
38ns
Current - Peak
1.5A
Number Of Configurations
1
Number Of Outputs
1
Voltage - Supply
4.5 V ~ 13.2 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS
UVLO and Thermal Shutdown
The LTC1693-5’s UVLO detector disables the input buffer
and pulls the output pin to V
remains off from V
during start-up or improper supply voltage values, the
LTC1693-5 will keep the output power P-channel MOSFET
off.
The LTC1693-5 also has a thermal detector that similarly
disables the input buffer and pulls the output pin to V
junction temperature exceeds 145 C. The thermal shut-
down circuit has 20 C of hysteresis. This thermal limit
helps to shut down the system should a fault condition
occur.
Input Voltage Range
LTC1693-5’s input pin is a high impedance node and
essentially draws neligible input current. This simplifies
the input drive circuitry required for the input.
The LTC1693-5 typically has 1.2V of hysteresis between
its low and high input thresholds. This increases the
driver’s robustness against any ground bounce noises.
However, care should still be taken to keep this pin from
any noise pickup, especially in high frequency switching
applications.
In applications where the input signal swings below the
GND pin potential, the input pin voltage must be clamped
to prevent the LTC1693-5’s parastic substrate diode from
turning on. This can be accomplished by connecting a
series current limiting resistor R1 and a shunting Schottky
diode D1 to the input pin (Figure 2). R1 ranges from 100
to 470 while D1 can be a BAT54 or 1N5818/9.
CC
U
= 1V to V
INFORMATION
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
CC
CC
INPUT SIGNAL
GOING BEL0W
if V
POTENTIAL
= 4V. This ensures that
Figure 2. Input Protection Against Negative Input Signals
GND PIN
W
CC
< 4V. The output
R1
D1
U
SUBSTRATE
PARASITIC
CC
IN
DIODE
if
Bypassing and Grounding
LTC1693-5 requires proper V
due to its high speed switching (ns) and large AC currents
(A). Careless component placement and PCB trace routing
may cause excessive ringing and under/overshoot.
To obtain the optimum performance from the LTC1693-5:
A. Mount the bypass capacitors as close as possible to the
B. Use a low inductance, low impedance ground plane to
C. Plan the ground routing carefully. Know where the large
D. Keep the copper trace between the driver output pin and
LTC1693-5
V
much as possible to reduce lead inductance. It is
recommended to have a 0.1 F ceramic in parallel with
a low ESR 4.7 F bypass capacitor.
For high voltage switching in an inductive environment,
ensure that the bypass capacitors’ V
high enough to prevent breakdown. This is especially
important for floating driver applications.
reduce any ground drop and stray capacitance. Re-
member that the LTC1693-5 switches 1.5A peak cur-
rents and any significant ground drop will degrade
signal integrity.
load switching current is coming from and going to.
Maintain separate ground return paths for the input pin
and output pin. Terminate these two ground traces only
at the GND pin of the driver (STAR network).
the load short and wide.
CC
and GND pins. The leads should be shortened as
GND
V
CC
1693-5 F02
CC
bypassing and grounding
LTC1693-5
MAX
ratings are
7