LTC1156CSW#PBF Linear Technology, LTC1156CSW#PBF Datasheet - Page 5
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LTC1156CSW#PBF
Manufacturer Part Number
LTC1156CSW#PBF
Description
IC MOSFET DVR HI-SIDE QUAD16SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1156CNPBF.pdf
(8 pages)
Specifications of LTC1156CSW#PBF
Configuration
High-Side
Input Type
Non-Inverting
Delay Time
450µs
Number Of Configurations
4
Number Of Outputs
4
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Peak
-
High Side Voltage - Max (bootstrap)
-
Lead Free Status / Rohs Status
Compliant
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OPER
A voltage regulator with low standby current provides
continuous bias for the TTL to CMOS converters. The TTL
to CMOS converter output enables the rest of the circuitry.
In this way the power consumption is kept to a minimum
in the standby mode.
Internal Voltage Regulation
The output of the TTL to CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
adaptive charge pump circuit which generates a gate
voltage substantially higher than the power supply volt-
age. The charge pump capacitors are included on chip and
therefore no external components are required to generate
the gate drive.
TYPICAL
BATTERY PACK
ATIO
4-CELL NiCd
5.2V TO 6V
A
PPLICATI
U
CONTROL
LOGIC
+
+
REG ON/OFF
FAULT
47 F
Switches with Short-Circuit Protection and 20 A Standby Current
O
4-Cell Extremely Low Voltage Drop Regulator and Three Load
U
** RCS02 ULTRONIX (303) 242-0810
* CAPACITOR ESR LESS THAN 0.5
S
IN1
IN2
IN3
IN4
DS2
DS3
DS4
GND GND
LTC1156
V
S
V
S
1N4148
DS1
G1
G2
G3
G4
10k
0.1 F
Drain Current Sense
The LTC1156 is configured to sense the drain current of
the power MOSFET in high side applications. An internal
100mV reference is compared to the drop across a sense
resistor (typically 0.002 to 0.1 ) in series with the drain
lead. If the drop across this resistor exceeds the internal
100mV threshold, the input latch is reset and the gate is
quickly discharged by a large N-channel transistor. A
simple RC network can be added to delay the over-current
protection so that large in-rush current loads such as
lamps or capacitors can be started.
Supply and Ground Pins
The two supply pins (3 and 8) of the LTC1156 must be
connected together at all times and the two ground pins (1
and 6) must be connected together at all times. The two
supply pins should be connected to the “top” of the drain
current sense resistor/s to ensure accurate sensing.
For further applications information, see the LTC1155
Dual High Side Micropower MOSFET Driver data sheet.
200pF
0.1 F
8
7
100k
100k
LT1431
6
**0.03
1
5
3
4
IRLR024
3.3A MAX
+
*470 F
LOAD
5V
LOAD
5V
LOAD
5V
2 Si9956DY
5V/2A
SWITCHED
LTC1156
1156 TA02
5