MAX5057AASA+T Maxim Integrated Products, MAX5057AASA+T Datasheet - Page 10
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MAX5057AASA+T
Manufacturer Part Number
MAX5057AASA+T
Description
IC MOSFET DRVR DUAL 8-SOIC
Manufacturer
Maxim Integrated Products
Type
Low Sider
Datasheet
1.MAX5054AATAT.pdf
(15 pages)
Specifications of MAX5057AASA+T
Configuration
Low-Side
Input Type
Inverting and Non-Inverting
Delay Time
20ns
Current - Peak
4A
Number Of Configurations
2
Number Of Outputs
2
Voltage - Supply
4 V ~ 15 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width) Exposed Pad, 8-eSOIC. 8-HSOIC
Rise Time
85 ns
Fall Time
75 ns
Supply Voltage (min)
4 V
Supply Current
2.4 mA
Maximum Power Dissipation
1538 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Maximum Turn-off Delay Time
35 ns
Maximum Turn-on Delay Time
35 ns
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The logic inputs are high impedance and must not be left
floating. If the inputs are left open, OUT_ can go to an
undefined state as soon as V
threshold. Therefore, the PWM output from the controller
must assume proper state when powering up the device.
The MAX5054 has two logic inputs per driver providing
greater flexibility in controlling the MOSFET. Use IN_+ for
noninverting logic and IN_- for inverting logic operation.
Connect IN_+ to V
Alternatively, the unused input can be used as an
ON/OFF function. Use IN_+ for active-low shutdown logic
and IN_- for active-high shutdown logic (see Figure 4).
See Table 1 for all possible input combinations.
The MAX5054–MAX5057 have low R
and n-channel devices (totem pole) in the output stage
for the fast turn-on and turn-off high gate-charge switch-
ing MOSFETs. The peak source or sink current is typically
4A. The OUT_ voltage is approximately equal to V
when in high state and is ground when in low state. The
driver R
source-/sink-current capability and faster switching
speeds. The propagation delays from the noninverting
and inverting logic inputs to outputs are matched to 2ns.
The break-before-make logic avoids any cross-conduc-
tion between the internal p- and n-channel devices, and
eliminates shoot-through currents reducing the quiescent
supply current.
4A, 20ns, Dual MOSFET Drivers
Table 1. MAX5054 Truth Table
Table 2. MAX5055/MAX5056/MAX5057
Truth Table
10
INA+/INB+
______________________________________________________________________________________
High
High
Low
Low
DS(ON)
IN_+
High
High
Low
IN_-
Low
is lower at higher V
DD
NONINVERTING
INVERTING
and IN_- to GND if not used.
INA-/INB-
High
High
Low
Low
DD
rises above the UVLO
DS(ON)
Driver Output
DD
OUT_
OUT_
High
High
Low
Low
OUTA/OUTB
, thus higher
High
Low
Low
Low
p-channel
DD
The driver’s R
inductance (L
(L
circuit with a second-order characteristic equation. The
series RLC circuit has an undamped natural frequency
(
The damping ratio needs to be greater than 0.5 (ideally 1)
to avoid ringing. Add a small resistor (R
with the gate when driving a very low gate-charge
MOSFET, or when the driver is placed away from the
MOSFET. Use the following equation to calculate the
series resistor:
L
TDFN packages, respectively. L
20nH/in. Verify L
Figure 4. Unused Input as an ON/OFF Function (1/2 MAX5054A)
P
G
0
) and a damping ratio ( ) where:
can be approximated as 3nH and 2nH for SO and
), and gate capacitance (C
INPUT
PWM
R
GATE
ON
P
0
), trace inductance (L
DS(ON)
Applications Information
G
2
with the MOSFET vendor.
(
OFF
L
P
(
(
(R
L
L
R
P
P
ON
L
ON
S
C
C
INA+
INA-
L
L
), internal bond and lead
S
S
1
G
G
L
MAX5054A
G
RLC Series Circuit
G
L
L
GND
V
)
DD
G
) form a series RLC
G
S
)
S
)
is on the order of
), gate inductance
OUTA
C
G
R
GATE
ON
) in series