IR22141SS International Rectifier, IR22141SS Datasheet
IR22141SS
Specifications of IR22141SS
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IR22141SS Summary of contents
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... DC-bus noise, the control and power ground use dedicated pins enabling low-side emitter current sensing as well. Undervoltage conditions in floating and low voltage circuits are managed independently. Typical connection www.irf.com IR21141SSPbF/IR22141SSPbF HALF-BRIDGE GATE DRIVER IC Product Summary Deadtime matching (max) Desat blanking time (typ) ...
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... The thermal resistance SS Definition IR21141 IR22141 ≤ 25 ° Definition † IR21141 †† IR22141 from +600 V or 1200 V. Logic state held for (referenced less than 200ns the IC will withstand a sustained peak IR21141/IR22141SSPbF Min. Max. Units 0 -0.3 625 -0.3 1225 -0.3 25 ...
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... DESAT DS Min Typ Max Units 7.2 8.0 8.8 V 6.3 7.0 7.7 — 1.0 — — 21 — µA — -160 — — -20 — IR21141/IR22141SSPbF Min Typ Max Units Test Conditions 9.3 10.2 11.4 8.7 9.3 10.3 — 0.9 — V 9.3 10.2 11.4 ...
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... Soft Shutdown on resistance ON,SSD I Output low short circuit pulsed current O- † SSD operation only www.irf.com Definition – –V B HOP CC LOP Definition or V HON LON † 4 IR21141/IR22141SSPbF Min Typ Max Units Test Conditions — 40 300 HOP/LOP PW≤ — 200 ns, resistive load, see Fig. 8 ...
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... IR21141/IR22141SSPbF Max. Units Test Conditions 660 & 600 660 or 1200 V, HOP shorted to HON, LOP — shorted to LON, Fig — 280 Fig. 8 4600 ...
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... DSL/DSH V DESAT COM on/off internal signal LOP/HOP desat internal signal Figure 6: HON, LON, SSDH and SSDL Diagram 6 IR21141/IR22141SSPbF schm itt trigger internal signal 10k 100k active bias comparator internal SSD signal 700k Figure 4: DSH and DSL Diagram LON/HON SSDL/SSDH V OL ...
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... HIN LIN (HOP=HON) LO (LOP=LON) HIN/LIN DSH/DSL SSD Driver Enable HO/LO www.irf.com 50% 50 out 90% 10% Figure 7: Switching Time Waveforms Ton1 Io1+ Io2+ Figure 8: Output Source Current DESAT Figure 9: Soft Shutdown Timing Waveform 7 IR21141/IR22141SSPbF 3.3V t off t f 90% 10% 3.3V © 2009 International Rectifier ...
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... HIN HO (HOP=HON) LO (LOP=LON) 50% www.irf.com 50 50% 50% t SY_FLT,DESAT3 DESAT2 90% SoftShutdown t DESAT3 90% SoftShutdown 50% 10 Turn-On Propagation Delay Figure 10: Desat Timing 50% 50% DTH MDT=DTH-DTL Figure 11: Internal Deadtime Timing 8 IR21141/IR22141SSPbF 50% 8V 50% t SY_FLT,DESAT4 Turn_Off propagation Delay 90% t DESAT4 90% SoftShutdown 50% 90 50% DTL 50% © 2009 International Rectifier ...
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... HOP High side driver sourcing output HON High side driver sinking output DSH High side IGBT desaturation protection input SSDH High side soft shutdown V High side floating supply return S www.irf.com IR21141/IR22141SSPbF 1 HIN LIN FLT_CLR SY_FLT FAULT/SD VSS SSOP24 SSDL COM LON ...
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... HO=0, LO=LIN UV_VCC HO/LO=1 UV_VBS Freeze STATE DIAGRAM Temporary State SOFT SHUTDOWN − START UP SEQUENCE − state, the HO goes high only if a rising edge event happens IR21141/IR22141SSPbF VB on/off HOP LATCH di/dt control Driver LOCAL DESAT soft HON PROTECTION shutdown SSDH UV_VBS DETECT ...
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... INPUT/OUTPUT ______ _________ SY_FLT FAULT/SD SSD: desat (out) SD: shutdown (in) HOLD: freezing FAULT: diagnostic (in) (out (SD) (FAULT) † (SSD (SSD (SSD) (FAULT) 0 (SSD) (FAULT (HOLD (FAULT) 11 IR21141/IR22141SSPbF SSDH/SSDL HiZ HiZ 0 Undervoltage Yes: V< UV threshold No : V> UV OUTPUTS threshold X: don’t care †† SSD ...
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... IR21141/IR22141SSPbF 1.4 Fault Management The IR21141/IR22141 is able to manage supply failure (undervoltage lockout) and transistor desaturation (on both the low and high side switches). ...
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... BL 1.4.4 Fault Management in Multi-Phase Systems In a system with two or more gate drivers the IR21141/IR22141 devices must be connected as shown in Fig. 15. 13 IR21141/IR22141SSPbF DesatHS DesatLS UVCC ). Once SS © 2009 International Rectifier ...
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... Fig. 16. In certain switching conditions (short pulses, high temperature) the recovery current of the external de- saturation sensing diode might reach levels beyond the capability of the active bias circuit. In order to avoid malfunctions and damage for the IC an external Schottky 14 IR21141/IR22141SSPbF When the and a pull- ...
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... Timing and Logic State Diagrams Description The following figures show the input/output logic diagram. Figure 17 shows the SY_FLT and FAULT/SD signals as outputs, whereas Fig. 18 shows them as inputs HIN LIN 15 IR21141/IR22141SSPbF ). This feature boosts the total on1 ) and © 2009 International Rectifier ...
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... FLT_CLR (see FAULT/SD section), D. The FAULT/SD is released and the outputs go back to follow the inputs, E. Externally driven low FAULT/SD: outputs go off by hard shutdown (like point B point A and B but for the low side output IR21141/IR22141SSPbF © 2009 International Rectifier ...
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... ESR ceramic may result in an efficient solution). Then we have: DC TOT + V GE The minimum size of bootstrap capacitor is: I LOAD motor V CEon example follows using IR2214SS or IR22141SS: COM a) using 125 ° C 1200 V IGBT (IRGP30B120KD): • 800 µA QBS • µA LK • 160 nC • Q drastically these G • I LK_GE • ...
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... Q IGBT gate). To obtain the desired switching time the gate resistance can be sized starting from Vcc , and voltage drop BS R < 100 ns IR21141/IR22141SSPbF supply. CC and R ). DRn * indicates the plateau ge and Q indicate the gate to collector and ...
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... V > must be verified to avoid spurious turn on. Rearranging the equation yields: to avoid BL is Goff R is approximately given by DRn RESoff 19 IR21141/IR22141SSPbF and R (see Fig. 22). If the voltage Goff DRn dV/dt HS Turning ON C RESoff R Goff OFF R C DRn IES Sizing: Current Path When Low Side is ...
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... Driven R Sizing OUT Gon Vth(min) CRESoff Table 3: R Sizing Goff 20 IR21141/IR22141SSPbF (calculated with the Goff / V/ns . out RGon → std commercial value RTOT - RDRp = 12.7 → 10 → 420 ns RTOT - RDRp = 32.5 → 33 → 202 ns RGon → std commercial value dVout/dt RTOT - RDRp = 6.5 → ...
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... parasitic Information below refers to Fig. 24: Bootstrap section: R1, C1, D1 High side gate: R2, R3, R4 High side Desat: D2 Low side supply: C2 Low side gate: R5, R6, R7 Low side Desat IR21141/IR22141SSPbF . DC IR2214 D3 Phase Top Layer Bottom Layer c) Ground Plane Figure 24: layout example © 2009 International Rectifier ...
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... Figures 25-83 provide information on the experimental performance of the IR21141/IR22141SSPbF HVIC. The line plotted in each figure is generated from actual lab data. A large number of individual samples from multiple wafer lots were tested at three temperatures (-40 ºC, 25 ºC, and 125 ºC) in order to generate the experimental (Exp.) curve. The line labeled Exp ...
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... C) Figure 32. V 2.20 1.90 Exp. 1.60 1.30 1.00 -50 75 100 125 C) Figure 34. LIN Logic "1" Input Voltage vs. Temperature 0.90 0.70 Exp. 0.50 0.30 0.10 75 100 125 - Figure 36 IR21141/IR22141SSPbF - 100 o Temperature ( C) Logic Input Voltage vs. Temperature IL - 100 o Temperature ( C) - 100 o Temperature ( C) LIN Logic Input Hysteresis vs. ...
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... Figure 38. V 2.10 Exp. 1.70 1.30 0.90 0.50 -50 75 100 125 o C) Figure 40. V 0.60 0.50 0.40 0.30 0.20 -50 75 100 125 o C) Figure 42 IR21141/IR22141SSPbF Exp. - 100 o Temperature ( C) FLTCLR Logic Input Voltage vs. IL Temperature - 100 o Temperature ( C) SD Logic Input Voltage vs. Temperature IH Exp. -25 ...
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... OH www.irf.com 2.40 2.00 1.60 1.20 0.80 75 100 125 - Figure 44 Exp 100 125 - Exp -50 75 100 125 IR21141/IR22141SSPbF Exp. - 100 o Temperature ( C) SYFLT Logic Input Voltage vs. Temperature IL - 100 o Temperature ( C) Figure 46 vs. Temperature OL - 100 o Temperature ( C) Figure 48 vs. Temperature OL © 2009 International Rectifier 125 125 ...
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... C) Figure 50. V 8.30 7.60 6.90 6.20 5.50 -50 75 100 125 C) Figure 52 Exp 100 125 - Figure 54. FAULT/SD Open Drain Resistance vs. 26 IR21141/IR22141SSPbF - 100 o Temperature ( C) DSH Input Voltage vs. Temperature DSH+ Exp. - 100 o Temperature ( C) DSH Input Voltage vs. Temperature DSH- - 100 o Temperature ( ...
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... C) Figure 56. DTL Off Deadtime vs. Temperature 780 660 540 Exp. 420 300 -50 75 100 125 C) Figure 58. TonH Propagation Delay vs. Temperature Exp -50 75 100 125 C) Figure 60. TrH Turn On Rise Time vs. Temperature 27 IR21141/IR22141SSPbF - 100 o Temperature ( C) - 100 o Temperature ( C) - 100 o Temperature ( C) © 2009 International Rectifier ...
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... C) Figure 62. TonL Propagation Delay vs. Temperature 100 125 - Figure 64. TrL Turn On Rise Time vs. Temperature 6 5 Exp 100 125 - IR21141/IR22141SSPbF Exp. - 100 o Temperature ( C) Exp. - 100 o Temperature ( C) - 100 o Temperature ( C) Figure 66. t vs. Temperature DSA T1 © 2009 International Rectifier 125 ...
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... Exp 100 125 - Exp 100 125 - 1.80 1.45 1.10 0.75 0.40 -50 75 100 125 o C) Figure 72. IO2+H SC Pulsed Current vs. Temperature 29 IR21141/IR22141SSPbF - 100 o Temperature ( C) Figure 68. t vs. Temperature DSA T3 - 100 o Temperature ( C) Figure 70. t vs. Temperature SSH Exp. - 100 o Temperature ( C) © 2009 International Rectifier 125 ...
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... C) Figure 74. IO-H SC Pulsed Current vs. Temperature 900 700 Exp. 500 300 100 75 100 125 - 3.00 2.50 2.00 Exp. 1.50 1.00 -50 75 100 125 o C) Figure 78. IO1+H SC Pulsed Current vs. Temperature 30 IR21141/IR22141SSPbF - 100 o Temperature ( C) - 100 o Temperature ( C) Figure 76. t vs. Temperature ON1H - 100 o Temperature ( C) © 2009 International Rectifier ...
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... Exp. 100 75 100 125 - Figure 82. I Exp. -50 - Temperature ( C) Figure 83. I Logic "0" Input Bias Current vs. LIN- Temperature 31 IR21141/IR22141SSPbF - 100 o Temperature ( C) Logic "1" Input Bias Current vs. HIN+ Temperature - 100 o Temperature ( C) Logic "1" Input Bias Current vs. LIN+ Temperature 100 125 © ...
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... Case Outline www.irf.com IR21141/IR22141SSPbF © 2009 International Rectifier 32 ...
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... IR21141/IR22141SSPbF Max 0.476 0.161 0.641 0.299 0.334 0.342 n/a 0.062 A Max 13.001 0.844 0.519 0.096 4.015 0.881 0.830 0.724 ...
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... ORDER INFORMATION 24-Lead SSOP IR21141SSPbF 24-Lead SSOP IR22141SSPbF 24-Lead SSOP Tape & Reel IR21141SSPbF 24-Lead SSOP Tape & Reel IR22141SSPbF WORLDWIDE HEADQUARTERS: 233 Kansas Street, El Segundo, CA 90245 Tel: (310) 252-7105 http://www.irf.com www.irf.com IR21141/IR22141SSPbF This part has been qualified per industrial level Data and specifications subject to change without notice ...