VND10N06-E STMicroelectronics, VND10N06-E Datasheet - Page 16

• Manufacturer Part Number: VND10N06-E
• Description: MOSFET OMNIFET 60V 10A DPAK
• Manufacturer: STMicroelectronics
• Series: OMNIFET™r
• Type: Low Sider

Specifications of VND10N06-E

• Input Type: Non-Inverting
• Number Of Outputs: 1
• On-state Resistance: 150 mOhm
• Current - Peak Output: 10A
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Switch Type: Low Side
• Power Switch Family: VND10N06
• Power Switch On Resistance: 150mOhm
• Output Current: 6A
• Mounting: Surface Mount
• Supply Current: 150uA
• Package Type: DPAK
• Pin Count: 2 +Tab
• Power Dissipation: 35W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Current - Output / Channel: -
• Lead Free Status / Rohs Status: Compliant

Protection features
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Protection features
During normal operation, the INPUT pin is electrically connected to the gate of the internal
power MOSFET through a low impedance path as soon as V
The device then behaves like a standard power MOSFET and can be used as a switch from
DC to 50KHz. The only difference from the user’s standpoint is that a small DC current I
flows into the INPUT pin in order to supply the internal circuitry.
During turn-off of an unclamped inductive load the output voltage is clamped to a safe level
by an integrated Zener clamp between DRAIN pin and the gate of the internal Power
MOSFET.
In this condition, the Power MOSFET gate is set to a voltage high enough to sustain the
inductive load current even if the INPUT pin is driven to 0V. The device integrates an active
current limiter circuit which limits the drain current ID to Ilim whatever the INPUT pin Voltage.
When the current limiter is active, the device operates in the linear region, so power
dissipation may exceed the heatsinking capability. Both case and junction temperatures
increase, and if this phase lasts long enough, junction temperature may reach the
overtemperature threshold T
If T
restart automatically when T
j
reaches T
jsh
, the device shuts down whatever the INPUT pin voltage. The device will
j
jsh
has cooled down to T
.
jrs
.
IN
> V
VND10N06 / VND10N06-1
IH
.
ISS