VN920-B513TR STMicroelectronics, VN920-B513TR Datasheet - Page 17

IC SSR HIGHSIDE 1CH P2PAK-4

VN920-B513TR

Manufacturer Part Number
VN920-B513TR
Description
IC SSR HIGHSIDE 1CH P2PAK-4
Manufacturer
STMicroelectronics
Type
High Sider
Datasheet

Specifications of VN920-B513TR

Input Type
Non-Inverting
Number Of Outputs
1
On-state Resistance
16 mOhm
Current - Output / Channel
45A
Voltage - Supply
5.5 V ~ 36 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
P²PAK (4 leads + Tab)
Switch Type
High Side
Power Switch Family
VN920
Power Switch On Resistance
16mOhm
Mounting
Surface Mount
Supply Current
10uA
Package Type
P2PAK
Operating Temperature (min)
-40C
Operating Temperature (max)
150C
Operating Temperature Classification
Automotive
Pin Count
4 +Tab
Power Dissipation
96.1W
Supply Voltage (min)
5.5 V
Maximum Power Dissipation
96100 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Peak Output
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
VN920-B513TR
Manufacturer:
ST
Quantity:
4 500
Part Number:
VN920-B513TR
Manufacturer:
ST
0
VN920
3.1.2
3.2
3.3
Solution 2: diode (D
A resistor (R
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
Load dump protection
D
V
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-V
Calculation example:
For V
5kΩ ≤ R
Recommended values: R
CC
ld
CCpeak
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
max DC rating. The same applies if the device is subject to transients on the V
CCpeak
prot
/I
latchup
≤ 65kΩ .
= - 100V and I
GND
≤ R
= 1kΩ) should be inserted in parallel to D
prot
≤ (V
prot
GND
OH
latchup
µ
=10kΩ .
C
) in the ground line
-V
≥ 20mA; V
IH
-V
GND
) / I
OH
IHmax
µ
C
≥ 4.5V
GND
if the device drives an
Application information
prot
) in line to
CC
CC
line,
line
17/34

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