L9848 STMicroelectronics, L9848 Datasheet - Page 18

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L9848

Manufacturer Part Number
L9848
Description
IC DRIVER LO/HI SIDE OCTAL 28SOI
Manufacturer
STMicroelectronics
Type
High Side/Low Side Driverr
Datasheet

Specifications of L9848

Input Type
SPI
Number Of Outputs
8
Current - Output / Channel
800mA
Current - Peak Output
1.3A
Voltage - Supply
4.75 V ~ 5.5 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
SO-28
Rise Time
30 ns
Fall Time
30 ns
Supply Voltage (min)
4.75 V
Supply Current
6 mA
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Drivers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
On-state Resistance
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Functional description
3.7.1
3.7.2
3.8
3.8.1
3.8.2
3.9
18/27
Initial fault register SPI Cycle
After initial application of VDD to the L9848, the fault register is "Cleared" by the POR
circuitry during the initial SPI cycle, and all subsequent cycles, valid fault data will be clocked
out of DO (fault bits). The bits that are "Set" indicate which particular output(s) have a fault
condition.
Incandescent lamp outputs
Software filtering may be needed to ignore fault signals due to the long turn on delay
associated with lamp loads. For example, the lamp load channel gets enabled during one
SPI cycle. Approximately 20ms-100ms later, a SPI cycle is required to read the correct fault
latch data, which will be cleared after the falling edge of CS of that SPI cycle.
Configuration for Output1-6
The drain and source pins for each output must be connected in one of the two following
configurations (see Figure 6a and Figure 6b).
Low side drivers
When any combination of Output1-6 are connected in a low side drive configuration the
source of the applicable output (SRC1-6) has to be connected to ground. The drain of the
applicable output (DRN1-6) has to be connected to the low side of the load.
High side drivers
When any combination of Output1-6 are connected in a high side drive configuration the
drain of the applicable output (DRN1-6) has to be connected to VBatt. The source of the
applicable output (SRC1-6) has to be connected to the high side of the load.
DRN1-6 susceptibility to negative voltage transients
For any output(s) connected and used for a high side drive a fast negative transient slew
rate does not inadvertently issue a POR (power on reset) or cause parasitic latching to
occur. Nevertheless under some conditions it may be necessary to have a ceramic chip
capacitor of 10nF to 100nF connected from drain to GND to aid in preventing the occurance
of a problem due to very fast negative transient(s) on the drain(s) of the device.
L9848

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