L9947S STMicroelectronics, L9947S Datasheet - Page 10

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L9947S

Manufacturer Part Number
L9947S
Description
IC DRIVER AUTO APPS MULTIWATT15
Manufacturer
STMicroelectronics
Type
Half Bridger
Datasheet

Specifications of L9947S

Input Type
Non-Inverting
Number Of Outputs
5
Operating Temperature
-40°C ~ 150°C
Mounting Type
Through Hole
Package / Case
Multiwatt-15 (Vertical, Bent and Staggered Leads)
Operating Supply Voltage
26 V
Supply Current
5 mA
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Current - Output / Channel
-
On-state Resistance
-
Current - Peak Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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L9947
Diagnostic (TABLE 2; STATUS 11 - 15):
The diagnostic delivers the information of the out-
put voltage status (high or low) at the outputs
OUT1 - OUT5, overcurrent, overvoltage shutdown
and over temperature. The output voltage detec-
tion is done by hysteresis comparators with
thresholds at 0.4VS and 0.6 VS. The overcurrent
(OVC) information is latched till a new or repeated
write command was received. The OVC1 is set to
high with the overcurrent condition at any of the
half-bridge outputs. OVC2 error bit will be set with
the overcurrent condition at OUT5. The overvol-
tage (OVV) is high till the supply voltage V
ceeds the overvoltage threshold of 20V typ.
The overtemperature (OT) is high if the junction
temperature is less than typ. 30 Kevin below the
thermal shutdown junction temperature (T
Detection of Load Interruption
(TABLE 3):
The outputs OUT1 - OUT4 are connected by the
motors in the application. The output OUT4 can
be switched as current source or sink with typ.
140mA current capability (status 16 + 17). The
sum of current consumption is <1mA if the output
current I
the output voltage delivers the information if one
or more of the half bridges is shorted to V
GND or the motor connections are interrupted. In
status 18 the outputs OUT1 - OUT3 are switched
as current sinks (typ. 10mA), OUt4 and OUt5 as
current sources (OUT4 140mA, OUT5 10mA).
With this current the influence of leakage currents
and oxidized contacts is eliminated.
Standby (TABLE!; STATUS 2):
The L9947 is set in standby mode with the posi-
tive edge of CSN when all other inputs are low.
All latched data will be cleared and the inputs and
outputs are in tristate.
The total current consumption is less than 100 A.
CSN=0 quits the standby. All latched data are
cleared.
Clear (TABLE 4: STATUS 20):
If the chip select is low for ore than T
the internal latched data will be cleared and the
outputs become tristate. Repetitive high low
edges activate the inputs again. Also a broken
CSN-wire activates this clear function due to the
internal pull down resistor at CSN input. After a
clear, the L9947 goes in standby and can be
10/13
OUT4
= 0 (status 17). The diagnostic of
CLR
= 100 s,
JSD
S
).
S
ex-
or
wake up with a negative edge of CSN.
Thermal Shutdown:
When the junction temperature increases above
T
until the junction temperature drops below the
value T
Clamp Current of The Power Outputs:
For output voltages 10V and larger a clamp cur-
rent of appr. 50 A will flow in the power outputs
due to the internal gate-source voltage limitation,
when the device is not in standby.
Overvoltage Shutdown:
When the supply voltage VS exceeds the overvol-
tage threshold V
- OUT5 go in tristate condition. If the supply volt-
age goes under the overvoltage shutdown tre-
shold, the status is the same as before the over-
voltage condition occurred.
Undervoltage:
In the voltage range 2V <V
logic is reseted and all outputs go in tristate. Also
ground spikes on the V
an internal reset of the logic, the L9947 is control-
led again by the inputs.
Ground Interrupt:
The L9947 is protected against interruption. The
output OUt5 switches off at ground interruption.
The outputs OUT1 - OUt4 are driven in full bridge
configuration as shown in the application. There
is no path through the load or direct to another
ground. Thus, the device protected.
V
If the supply voltage V
terrupted or not supplied, than two cases can be
distinguished:
JSD
CC
1 The data pins D0 - D3 are not driven by the
2 One of the pins D0 - D3 is driven high the
OUT5 and D0 - D3 are in tristate.
drain-bulk-diode of the p-channel mos (fig.5).
Depending of the CSN, R/WN and MODE in-
puts some undesiderable functions can occur.
the power DMOS transistors are switched off
Interruption
C or they are low. So the outputs OUT1 -
C. This pin supplies the VCC pin by the
JSD
- T
JHYST
SQVT
.
, typ. 20V,the outputs OUT1
S
CC
is present and V
reset the logic. After
CC
< 4V the internal
CC
is in-

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