ATA6824-PNQW Atmel, ATA6824-PNQW Datasheet - Page 11

• Manufacturer Part Number: ATA6824-PNQW
• Description: IC H-BRIDGE MOTOR DRIVER
• Manufacturer: Atmel

Specifications of ATA6824-PNQW

• Applications: DC Motor Controller
• Number Of Outputs: 1
• Voltage - Supply: 6.5 V ~ 21.3 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.6
5.7
5.8
5.9
5.9.1
4931L–AUTO–02/11
Charge Pump
Thermal Shutdown
H-bridge Driver
VG Regulator
Cross Conduction Time
The VG regulator is used to generate the gate voltage for the low-side driver. Its output voltage
will be used as one input for the charge pump, which generates the gate voltage for the
high-side driver. The purpose of the regulator is to limit the gate voltage for the external power
MOS transistors to 12V. It needs a ceramic capacitor of 470nF for stability. The output voltage
is reduced if the supply voltage at VBAT falls below 12V.
The integrated charge pump is needed to supply the gates of the external power MOS transis-
tors. It needs a shuffle capacitor of 220nF and a reservoir capacitor of 470nF. Without load,
the output voltage on the reservoir capacitor is V
with a dedicated internal oscillator of 100KHz. The charge pump is designed to reach a good
EMC level. The charge pump will be switched off for V
There is a thermal shutdown block implemented. With rising junction temperature, a first warn-
ing level will be reached at 180°C. At this point the IC stays fully functional and a warning will
be sent to the microcontroller. At junction temperature 200°C the drivers for H1, H2, L1, L2,
SIO and the VCC regulator will be switched off and a reset occurs.
The IC includes two push-pull drivers for control of two external power NMOS used as
high-side drivers and two push-pull drivers for control of two external power NMOS used as
low-side drivers. The drivers are able to be used with standard and logic-level power NMOS.
The drivers for the high-side control use the charge pump voltage to supply the gates with a
voltage of VG above the battery voltage level. The low-side drivers are supplied by VG
directly. It is possible to control the external load (motor) in the forward and reverse direction
(see
100% is possible in both directions.
To prevent high peak currents in the H-bridge, a non-overlapping phase for switching the
external power NMOS is realized. An external RC combination defines the cross conduction
time in the following way:
t
The RC combination is charged to 5V and the switching level of the internal comparator is
67% of the start level.
The resistor R
C
The time measurement is triggered by the PWM or DIR signal crossing the 50% level.
CC
CC
(µs) = 0.41
value has to be 5nF. Use of COG capacitor material is recommended.
Table 5-1 on page
CC
R
must be greater than 5k and should be as close as possible to 10k , the
CC
(k )
10). The duty cycle of the PMW controls the speed. A duty cycle of
C
CC
(nF) (tolerance: ±5% ±0.15µs)
VBAT
VBAT
plus VG. The charge pump is clocked
> V
THOV
Atmel ATA6824
.
11