A4982SETTR-T Allegro Microsystems Inc, A4982SETTR-T Datasheet
A4982SETTR-T
Specifications of A4982SETTR-T
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A4982SETTR-T Summary of contents
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DMOS Microstepping Driver with Translator Features and Benefits ▪ Low R outputs DS(ON) ▪ Automatic current decay mode detection/selection ▪ Mixed and Slow current decay modes ▪ Synchronous rectification for low power dissipation ▪ Internal UVLO ▪ Crossover-current protection ▪ ...
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... PWM operation. Internal circuit protection includes: thermal shutdown with hysteresis, undervoltage lockout (UVLO), and crossover-current protection. Selection Guide Part Number A4982SETTR-T 32-pin QFN with exposed thermal pad A4982SLPTR-T 24-pin TSSOP with exposed thermal pad Absolute Maximum Ratings ...
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A4982 VREG VDD Current Regulator REF DAC PWM Latch Blanking Mixed Decay STEP DIR RESET Control Translator MS1 Logic MS2 PWM Latch ENABLE Blanking Mixed Decay SLEEP DAC V REF DMOS Microstepping Driver with Translator Functional Block Diagram 0.22 F ...
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A4982 ELECTRICAL CHARACTERISTICS Characteristics Output Drivers Load Supply Voltage Range Logic Supply Voltage Range Output On Resistance Body Diode Forward Voltage Motor Supply Current Logic Supply Current Control Logic Logic Input Voltage Logic Input Current Microstep Select Logic Input Hysteresis ...
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A4982 THERMAL CHARACTERISTICS may require derating at maximum conditions Characteristic Symbol Package Thermal Resistance *In still air. Additional thermal information available on Allegro Web site. DMOS Microstepping Driver with Translator Test Conditions* ET package; estimated, on 4-layer PCB, based on ...
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A4982 STEP MS1, MS2, RESET, or DIR STEP minimum, HIGH pulse width STEP minimum, LOW pulse width Setup time, input change to STEP Hold time, input change to STEP Figure 1. Logic Interface Timing Diagram Table 1. Microstep Resolution Truth ...
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A4982 The A4982 is a complete microstepping Device Operation. motor driver with a built-in translator for easy operation with minimal control lines designed to operate bipolar step- per motors in full-, half-, quarter-, and sixteenth-step resolution modes. The ...
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A4982 Slow Mixed Decay Decay Missed Step Voltage on ROSC terminal 2 V/div. Step input 10 V/div. Figure 2. Missed steps in low-speed microstepping I 500 mA/div. LOAD Step input 10 V/div. Figure 3. Continuous stepping using automatically-selected mixed stepping ...
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A4982 The DAC output reduces the V output to the current sense REF comparator in precise steps, such that I = (%I / 100) trip TripMAX (See table 2 for %I at each step.) TripMAX It is critical that the ...
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A4982 ( ¯ S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ minimize power consumption Sleep Mode when the motor is not in use, this input disables much of the internal circuitry including ...
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A4982 V STEP 100.00 70.71 I OUT 0 –70.71 –100.00 I OUT Symbol I Figure 7. Current Decay Modes Timing Chart DMOS Microstepping Driver with Translator See Enlargement A Enlargement PEAK Characteristic t Device fixed off-time ...
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A4982 Layout. Typical application circuits and layouts are shown in figures 8 (LP package) and 9 (ET package).The printed circuit board should use a heavy groundplane. For optimum electrical and thermal performance, the A4982 must be soldered directly onto the ...
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A4982 OUT2B OUT2A OUT1A GND ROSC GND Figure 9. ET package typical application and circuit layout VDD VBB 8 V GND GND V BB VREG SENSE 10 V GND DMOS Microstepping Driver with ...
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A4982 STEP 100.00 70.71 Phase 1 I OUT1A 0.00 Direction = H (%) –70.71 –100.00 100.00 70.71 Phase 2 I OUT2A 0.00 Direction = H (%) –70.71 –100.00 Figure 10. Decay Mode for Full-Step Increments STEP Phase 1 I OUT1A ...
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A4982 STEP 100 Phase OUT1A Direction = H 0 (%) –10 –20 –29 –38 –47 –56 –63 –71 –77 –83 –88 –96 –100 100 96 88 ...
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A4982 Table 2. Step Sequencing Settings Home microstep position at Step Angle 45º; DIR = H Full Half 1/4 1/16 Phase 2 Step Step Step Step Current (#) (#) (#) (#) (% I TRIP(max 18.75 ...
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A4982 ET Package OUT2B VBB2 ENABLE 5 GND 6 CP1 7 CP2 8 Terminal List Table Name CP1 CP2 DIR ¯ E ¯ ¯ N ¯ ¯ A ¯ ¯ B ¯ ¯ L ...
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A4982 ET Package, 32-Contact QFN with Exposed Thermal Pad 33X 0.08 C 0.25±0.10 0.50±0. DMOS Microstepping Driver with Translator 5.00 ±0. 5.00 ±0.15 C SEATING PLANE 0.90 ±0.10 C ...
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A4982 LP Package, 24-Pin TSSOP with Exposed Thermal Pad 7.80 ±0. 4.32 24X 0.10 C +0.05 0.25 0.65 –0.06 DMOS Microstepping Driver with Translator And Overcurrent Protection 4° ±4 0.15 3.00 4.40 ±0.10 6.40 ±0.20 ...
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A4982 Revision History Revision Rev. 1 Copyright ©2008-2011, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to ...