A3949SLP Allegro Microsystems Inc, A3949SLP Datasheet
A3949SLP
Specifications of A3949SLP
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A3949SLP Summary of contents
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Features and Benefits ▪ Single supply operation ▪ Very small outline package ▪ Low R outputs DS(ON) ▪ Sleep function ▪ Internal UVLO ▪ Crossover current protection ▪ Thermal shutdown protection Packages: Package LB, 16-pin SOIC with internally fused pins ...
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A3949 Selection Guide Part Number A3949SLBTR-T 16-pin, SOIC Absolute Maximum Ratings Characteristic Load Supply Voltage Logic Input Voltage Sense Voltage Output Current, Repetitive Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Package Thermal Characteristics* Characteristic Package Thermal Resistance *Additional information ...
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A3949 ELECTRICAL CHARACTERISTICS Characteristics Output-On Resistance Body Diode Forward Voltage Motor Supply Current Logic Input Voltage PHASE, ENABLE, MODE Logic Input Voltage SLEEP Logic Input Current PHASE, MODE pins Logic Input Current ENABLE pin Logic Input Current SLEEP pin Propagation ...
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A3949 PWM Control Timing Diagram SLEEP ENABLE PHASE MODE V BB OUTA OUTB OUT OUTA 1 2 DMOS Full-Bridge Motor Driver VBB OUTA OUTB 5 ...
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A3949 VREG. This supply voltage is used to operate the sink- side DMOS outputs. VREG is internally monitored and in the case of a fault condition, the outputs of the device are disabled. The VREG pin should be decoupled with ...
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A3949 Name N/C MODE PHASE GND SLEEP ENABLE OUTA SENSE VBB OUTB CP1 CP2 GND VCP VREG N/C *These pins are internally connected. DMOS Full-Bridge Motor Driver LB Package N N/C MODE 2 15 VREG PHASE 3 14 ...
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A3949 10. 16X 0.10 C 0.41 1.27 Copyright ©2003-2010, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions ...