A3958SLBTR Allegro Microsystems Inc, A3958SLBTR Datasheet
![no-image](/images/manufacturer_photos/0/0/32/allegro_microsystems_inc_sml.jpg)
A3958SLBTR
Specifications of A3958SLBTR
Available stocks
Related parts for A3958SLBTR
A3958SLBTR Summary of contents
Page 1
Discontinued Product This device is no longer in production. The device should not be purchased for new design applications. Samples are no longer available. Date of status change: November 1, 2010 Recommended Substitutions: For existing customer transition, and for new ...
Page 2
Features and Benefits ▪ ± continuous output rating ▪ Low r outputs (270 mΩ, typical) DS(on) ▪ Programmable mixed, fast, and slow current-decay modes ▪ Serial interface controls chip functions ▪ Synchronous rectification for low power dissipation ...
Page 3
... Part Number A3958SB-T* 24-pin DIP with exposed thermal tabs A3958SLBTR-T 24-pin SOICW with internally fused pins Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for new design applications because obsolescence in the near future is probable ...
Page 4
A3958 ELECTRICAL CHARACTERISTICS < 50 kHz (unless noted otherwise) PWM Characteristics Output Drivers Load Supply Voltage Range Output Leakage Current Output On Resistance Body Diode Forward Voltage Load Supply Current Control Logic Logic Supply Voltage Range Logic ...
Page 5
A3958 ELECTRICAL CHARACTERISTICS (continued 0 < 50 kHz (unless noted otherwise) PWM Characteristics Control Logic Buffer Input Offset Volt. Reference Divider Ratio Propagation Delay Times Thermal Shutdown Temp. Thermal Shutdown Hysteresis UVLO Enable Threshold UVLO Hysteresis ...
Page 6
A3958 Serial Interface. The A3958 is controlled via a 3-wire (clock, data, strobe) serial port. The programmable functions allow maximum fl exibility in confi guring the PWM to the motor drive requirements. The serial data is clocked in starting with ...
Page 7
A3958 D15 Phase Logic. Bit D15, in conjunction with PHASE, determines if the device is operating in the forward (PHASE ≠ D15) or reverse (PHASE = D15) state. PHASE D15 State 0 0 Reverse 1 0 Forward 0 1 Forward ...
Page 8
A3958 internally monitored and in the case of a fault condition, the outputs of the device are disabled. Charge Pump. The charge pump is used to generate a gate-supply voltage greater than V side DMOS gates. A 0.22 μF ceramic ...
Page 9
A3958 Current Sensing. To minimize inaccuracies in sensing the I current level, which may be caused by TRIP ground trace IR drops, the sense resistor should have an independent ground return to the ground terminal of the device. For low-value ...
Page 10
A3958 A3958SB CHARGE PUMP θ PHASE 3 OSC 4 GROUND 5 GROUND 6 GROUND 7 GROUND 8 LOGIC SUPPLY ENABLE 10 DATA 11 SERIAL PORT CLOCK 12 Terminal List Terminal ...
Page 11
A3958 1.27 MIN +0.25 1.52 –0.38 15.40±0. 24X 0.10 C 0.41 ±0.10 1.27 For reference only Pins 6 and 7, and 18 and 19 internally fused Dimensions in millimeters (Reference JEDEC MS-013 ...