A3968SLB Allegro Microsystems Inc, A3968SLB Datasheet - Page 6
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A3968SLB
Manufacturer Part Number
A3968SLB
Description
IC MOTOR DRIVER PWM DUAL 16SOIC
Manufacturer
Allegro Microsystems Inc
Datasheet
1.A3968SLBTR-T.pdf
(8 pages)
Specifications of A3968SLB
Applications
PWM Motor Driver
Number Of Outputs
2
Current - Output
±650mA
Voltage - Load
4.75 V ~ 30 V
Voltage - Supply
4.75 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A3968SLB
Manufacturer:
ALLE
Quantity:
5 510
Part Number:
A3968SLB
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Part Number:
A3968SLBT
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Part Number:
A3968SLBTR
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Part Number:
A3968SLBTR-T
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
A3968
Internal PWM Current Control.
full-bridges bidirectionally control two DC motors. A
internal fi xed-frequency PWM control circuit controls the
the load current in each motor. The current-control circuitry
works as follows: when the outputs of the full-bridge are
turned on, current increases in the motor winding. The load
current is sensed by the current-control comparator via
an external sense resistor. R
increase until it reaches the predetermined value, set by the
selection of external current-sensing resistors and reference
input voltage (V
where I
to the base-drive current of the sink driver transistor.
able latch, turning off the source driver of that full-bridge.
The source turn-off of one full-bridge is independent of
the other full-bridge. Load inductance causes the current to
recirculate through the sink driver and ground-clamp diode.
The current decreases until the internal clock oscillator sets
the source-enable latches of both Full-bridges, turning on
the source drivers of both bridges. Load current increases
again, and the cycle is repeated.
the external timing components R
Enlargement A
OSCILLATOR
INTERNAL
At the trip point, the comparator resets the source-en-
The frequency of the internal clock oscillator is set by
V
I
OUT
PHASE
SO
+
0
–
is the sense-current error (typically 18 mA) due
BRIDGE
ON
I
TRIP
REF
BRIDGE
= I
) according to the equation:
ON
t
d
OUT
R C
T T
I
TRIP
+ I
S
. Load current continues to
SO
SOURCE
OFF
Dual Full-Bridge PWM Motor Driver with Brake
See Enlargement A
= V
T
t
blank
C
REF
The A3968 dual
T
. The frequency can
ALL
OFF
/(4 R
FUNCTIONAL DESCRIPTION
S
)
Dwg. WM-003-2
n
be approximately calculated as:
where t
20 to 100 k and 470 to 1000 pF respectively. Nominal
values of 56 k and 680 pF result in a clock frequency of
25.4 kHz.
Current-Sense Comparator Blanking. When the
source driver is turned on, a current spike occurs due to the
reverse-recovery currents of the clamp diodes and switch-
ing transients related to distributed capacitance in the load.
To prevent this current spike from erroneously resetting the
source enable latch, the current-control comparator output
is blanked for a short period of time when the source driver
is turned on. The blanking time is set by the timing compo-
nent C
of 1.3 μs.
the load current changes polarity (direction or phase
change). This internally generated blank time is approxi-
mately 1.8 μs.
The range of recommended values for R
A nominal C
The current-control comparator is also blanked when
T
blank
according to the equation:
is defi ned below.
T
value of 680 pF will give a blanking time
f
osc
t
blank
= 1/(R
= 1900 C
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
V
BB
R S
T
C
T
+ t
T
(μs).
blank
BRIDGE ON
SOURCE OFF
ALL OFF
)
T
Dwg. EP-006-16
and C
T
are
6