LTC3589HUJ#PBF Linear Technology, LTC3589HUJ#PBF Datasheet - Page 18

• Manufacturer Part Number: LTC3589HUJ#PBF
• Description: IC DC/DC CONV 8-OUTPUT 40QFN
• Manufacturer: Linear Technology

Specifications of LTC3589HUJ#PBF

• Applications: Handheld/Mobile Devices
• Current - Supply: 8µA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: *
• Primary Input Voltage: 5.5V
• No. Of Outputs: 8
• Output Voltage: 5V
• Output Current: 1.6A
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +150°C
• Msl: MSL 1 - Unlimited
• No. Of Ldo Regulators: 3
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OPERATION
LTC3589/LTC3589-1
LDO1_STBY is protected from short-circuits and over-
loading.
250mA LDO REGULATORS
Three LDO regulators on the LTC3589/LTC3589-1 will
each deliver up to 250mA output. The LDO regulators
are enabled by pin input or I
EN_LDO2 enables LDO2 and the LTC3589 EN_LDO34 pin
enables LDO3 and LDO4 together. An I
ter bit is available to decouple LDO4 from pin EN_LDO34
so that LDO4 is under command register control only.
The LTC3589-1 EN_LDO3 pin enables LDO3 only. LDO4
is controlled using the I
regulators have current limit protection circuits. When
disabled, a 2.5k internal pull-down resistor is connected
to the regulators output.
To help reduce LDO power loss in the system, the regula-
tors have dedicated supply inputs that may be lower than
the main V
each of the output pins LDO2, LDO3, and LDO4.
18
Figure 1. Always-On LDO Application Circuit
TO 0.75V
0.3625V
0.8V
IN
supply. Connect a low ESR 1μF capacitor to
Figure 2. LDO2 Application Circuit
–
+
DAC
EA
V
IN
2
C command registers. All the
LDO1_STBY
LDO1_FB
PV
2
C command register. Pin
IN
5
3589 F01
LDO2
3589 F02
FB
2
C command regis-
R1
R2
R1
R2
1μF
1μF
LDO Regulator 2
One of the LTC3589/LTC3589-1 dynamic slewing DACs
serves as the reference input of LDO2. The output range
of LDO2 is set using an external resistor divider connected
from LDO2 to the feedback pin LDO2_FB, as shown in
Figure 2. Set the output voltage of LDO2 using the fol-
lowing formula:
L2DTVx is the fi ve bit word contained in the LDO2 dynamic
target voltage 1 (L2DTV1) or the LDO2 dynamic target
voltage 2 (L2DTV2) command registers. The default value
of L2DTVx[4-0] is 11001 to output a reference voltage
of 0.675V. LDO2 is enabled by writing bit 4 in the output
voltage enable (OVEN) command register to 1 or driving
the LDO2_EN pin high. Whenever the command is given to
slew LDO2 DAC reference to a lower voltage an integrated
2.5k pull-down resistor is connected to LDO2 output.
Table 2. Shows the I
to control LDO2.
Table 2. LDO 2 Command Register Settings
COMMAND
REGISTER[BIT]
OVEN[4]
SCR2[4]
VCCR[5]
VCCR[6]
VRRCR[7-6]
L2DTV1[4-0]
L2DTV1[5]
L2DTV1[7]
L2DTV2[4-0]
* Denotes Default Power-On Value
V
OUT
= 1+
VALUE
11001* DAC Dynamic Target Voltage V1
11001* DAC Dynamic Target Voltage V2
R2
R1
0*
1
0*
1
0*
1
1
00
01
10
11*
0*
1
0*
1
• (0.3625 + L2DTVx • 0.0125)
2
C command register settings used
SETTING
Disable
Enable
Wait for Output Below 300mV Before Enable
Enable Immediately
Select Register L2DTV1 (V1) Reference
Select Register L2DTV2 (V2) Reference
Initiate Dynamic Voltage Slew
Reference Slew Rate = 0.88mV/μs
Reference Slew Rate = 1.75mV/μs
Reference Slew Rate = 3.5mV/μs
Reference Slew Rate = 7mV/μs
Force PGOOD Low When Slewing
Normal PGOOD Operation When Slewing
Shutdown LDO2 Normally
Keep LDO2 Alive
3589fc