LTC1699EMS8-81 Linear Technology, LTC1699EMS8-81 Datasheet - Page 12

IC PROGRAMMER VOLT SMBUS 8MSOP

LTC1699EMS8-81

Manufacturer Part Number
LTC1699EMS8-81
Description
IC PROGRAMMER VOLT SMBUS 8MSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1699EMS8-81

Applications
Processor
Current - Supply
350µA
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1699EMS8-81
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC1699EMS8-81#PBF
Manufacturer:
LINEAR/凌特
Quantity:
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APPLICATIO S I FOR ATIO
LTC1699 Series
Table 2. LTC1699-80, LTC1699-81 and LTC1699-82
Command Bits
C7
0
0
0
0
Write Word Protocol
Each Write Word protocol (Figure 2) begins with a start bit
(S) and ends with a stop bit (P). As shown in the Timing
Diagram the start and stop bits are defined as high to low
and low to high transitions respectively, while SCL is high.
In between the start and stop bits, the microprocessor
transmits four bytes to the LTC1699-80, LTC1699-81 or
LTC1699-82. These are the address byte, an 8-bit com-
mand code and two data bytes. The LTC1699-80,
LTC1699-81 and LTC1699-82 sample each bit at the rising
edges of the SCL clock.
When the microprocessor issues a start bit, all the slave
devices on the bus, including the LTC1699-80, LTC1699-81
or LTC1699-82 clock in the address byte, which consists
of a 7-bit slave address and the R/W bit (set to 0). If the
12
S 1110001
S 1110001
S 1110001
S 1110001 R/W
C6
ADDRESS
ADDRESS
ADDRESS
ADDRESS
0
1
0
1
SLAVE
SLAVE
SLAVE
SLAVE
R/W
R/W
R/W
U
A
A
A
A
C5
0
1
1
0
READ-BACK
COMMAND
COMMAND
COMMAND
COMMAND
000XXXXX
011XXXXX
001XXXXX
010XXXXX
SETUP
OFF
ON
U
COMMAND
COMMAND
LATCHED
LATCHED
COMMAND
Read-Back
A
A
A
A
Setup
S 1110010
On
Off
VID4 VID3 VID2 VID1 VID0
W
Figure 2. Write Word and Read Word Protocols
(REGISTER 0)
(REGISTER 0)
(REGISTER 0)
RD A
DON’T CARE
DON’T CARE
DATA LOW
DATA LOW
DATA LOW
DATA LOW
PROTOCOL
Write Word
Write Word
Write Word
LOADED
Read Word
VID4 VID3 VID2 VID1 VID0
U
X X X
(REGISTER 0)
DATA LOW
LATCHED
DATA LOW
A
A
A
VID4 VID3 VID2 VID1 VID0
slave address from the microprocessor does not match
the internal hardwired address, the LTC1699-80,
LTC1699-81 or LTC1699-82 returns to an idle state and
waits for the next start bit. If the slave address matches,
the LTC1699-80, LTC1699-81 or LTC1699-82 acknowl-
edges by pulling the SDA line low for one clock cycle after
the address byte. After detecting the acknowledgement bit
(A), the microprocessor transmits the second byte or
command code. The command code identifies the type of
Write Word protocol as Setup, On or Off (Table 2). The
Setup protocol is used to load two resistor divider settings
into Register 0 and 1. The On and Off protocols turn the
converters on or off in conjunction with the VRON pin.
Once all 8 bits of the command code are clocked in, the
LTC1699-80, LTC1699-81 or LTC1699-82 issues a sec-
ond acknowledgement bit to the microprocessor. After
detecting the acknowledgement bit, the microprocessor
transmits two data bytes. Each data byte is acknowledged
in turn for all three Write Word protocols but is only
latched into Register 0 or 1 in Setup protocol. This
prevents previously loaded settings from accidentally
being changed. The first or Data Low byte is loaded into
Register 0. The second or Data High byte is loaded into
DCON
(REGISTER 1)
(REGISTER 1)
(REGISTER 1)
DON’T CARE
DON’T CARE
DATA HIGH
DATA HIGH
DATA HIGH
0 0
A
DATA HIGH
LOADED
VID4 VID3 VID2 VID1 VID0
X X X
DATA HIGH
LATCHED
UPDATE DCON
UPDATE DCON
A P
A P
A P
(REGISTER 1)
DATA HIGH
UPDATE DCON
DCON
0 0
(IGNORED)
A P
STOP

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