LTC3524EUF#PBF Linear Technology, LTC3524EUF#PBF Datasheet - Page 13

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LTC3524EUF#PBF

Manufacturer Part Number
LTC3524EUF#PBF
Description
IC TFT BIAS SUPPLY ADJ 24-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3524EUF#PBF

Applications
LCD Display
Voltage - Supply
2.5 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-QFN
Operating Supply Voltage (typ)
3.3/5V
Number Of Segments
8
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
QFN EP
Pin Count
24
Mounting
Surface Mount
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC3524EUF#PBFLTC3524EUF
Manufacturer:
LT
Quantity:
10 000
Company:
Part Number:
LTC3524EUF#PBF
Manufacturer:
LT
Quantity:
3 500
APPLICATIONS INFORMATION
and VH should be at least 0.47μF. Please be certain that
the capacitors used are rated for the maximum voltage
with adequate safety margin. Refer to Table 2 for a listing
of capacitor vendors.
Table 2. Capacitor Vendor Information
Supplier
AVX
Murata
Samsung
Taiyo Yuden
TDK
LAYOUT NOTES:
*KEEP R
LIGHT GREY TOP LAYER
VIA TO BOTTOM GROUND PLANE.
GROUND PLANE FILLS BOTTOM
V
GND
PROG
OUT
V
IN
AWAY FROM SW2 TRACES
(803) 448-9411
(714) 852-2001
(408) 544-5200
(800) 368-2496
(847) 803-6100
Phone
L1
R1
Figure 4. Suggested Layout Two Layer Board (Not to Scale)
www.component.tdk.com
www.sem.samsung.com
www.avxcorp.com
www.t-yuden.com
www.murata.com
Website
V OUT
ELCD
FBVO
SW1
V IN
C2 –
1
2
3
4
5
6
ELCD
ELED1 ELED2
ELED1
L2
C2 +
24
7
*
PROG
V2x
23
8
COMPONENT AND IC SIZES
ELED2
NOT TO SCALE
VN IN
Printed Circuit Board Layout Guidelines
High-speed operation of the LTC3524 demands care-
ful attention to PCB layout. You will not get advertised
performance with a careless layout. Figure 4 shows the
recommended component placement for a double layer
PCB. The bottom layer is used as a common ground plane
except for the VN trace.
22
9
TOP VIEW
GND
GND
SCHOTTKY DIODE
SW2
CN +
21
10
VLED
NC
20
11
SCHOTTKY
DIODE
LED1
VN
19
12
LED2
CH
CH
FBH
FBN
VH
18
17
16
15
14
13
+
VN
WHITE LEDs
WHITE LEDs
3524 F04
LTC3524
VH
13
3524f

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