LTC4425EDD#PBF Linear Technology, LTC4425EDD#PBF Datasheet - Page 10

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LTC4425EDD#PBF

Manufacturer Part Number
LTC4425EDD#PBF
Description
IC SUPERCAP CHARGER 12-DFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4425EDD#PBF

Applications
Supercapacitor Charger
Current - Supply
20µA
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
12-DFN
Battery Type
Li-Ion/Li-Pol
Output Current
3A
Output Voltage
5.5V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 125C
Mounting
Surface Mount
Pin Count
8
Operating Temperature Classification
Automotive
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LTC4425
OPERATION
Thermal Regulation
In either mode, if the die temperature starts to approach
105°C due to internal power dissipation, a thermal regula-
tor limits the die temperature to approximately 105°C by
reducing the charge current. Even in thermal regulation,
the PROG pin continues to give an indication of the charge
current. The thermal regulation protects the LTC4425 from
excessive temperature and allows the user to push the
limits of the power handling capability of a given circuit
board without the risk of damaging the LTC4425 or the
external components. Another benefi t of this feature is that
the charge current can be set according to typical, rather
than worst-case, ambient temperatures for a given applica-
tion with the assurance that the charger will automatically
reduce the charge current in worst-case conditions.
Voltage Clamp Circuitry
The LTC4425 is equipped with circuitry to limit the voltage
across any supercap of the stack to a maximum allowable
voltage V
2.7V, for V
should be set to logic low for lower V
2.45V and to logic high for the higher V
2.7V. If the voltage across the bottom capacitor, i.e., the
V
transistor turns on and starts to bleed charge off of the
bottom capacitor to GND. Similarly, if the voltage across
the top capacitor, V
PMOS shunt transistor turns on and starts to bleed charge
off of the top capacitor to the bottom one.
When the voltage across any of the supercaps reaches
within 50mV of V
starts to cut back the charge current linearly. By the time
any of the shunt devices are on, the charge current gets
reduced to 1/10 of the programmed value and stays at
this reduced level as long as the shunt device is on. This
is to prevent the shunt devices from getting damaged by
excessive heat. The comparators that control the shunt
devices have a 50mV hysteresis meaning that when the
voltage across either capacitor is reduced by 50mV, the
shunt devices turn off and normal charging resumes with
full charge current unless limited by any of the other am-
plifi ers controlling the gate of the charger FET. In the event
10
MID
pin voltage reaches V
CLAMP
CLAMP
. There are two preset voltages, 2.45V or
selectable by the SEL pin. The SEL pin
TOP
CLAMP
, reaches the V
, a transconductance amplifi er
CLAMP
fi rst, an NMOS shunt
CLAMP
CLAMP
CLAMP
voltage fi rst, a
voltage of
voltage of
both capacitors exceed their maximum allowable voltage,
V
both shunt devices turn on. Both shunt devices are actually
current mirrors guaranteed to shunt more current away
than that coming through the charger FET.
Leakage Balancing Circuitry
The LTC4425 is equipped with an internal leakage balancing
amplifi er, LBA, which servos the midpoint, i.e., V
voltage, to exactly half of the output voltage, V
it has a very limited source and sink capability of approxi-
mately 1mA. It is designed to handle slight mismatch of
the supercaps due to leakage currents; not to correct any
gross mismatch due to defects. The balancer is only active
as long as there is an input present. The internal balancer
eliminates the need for external balancing resistors.
Short-Circuit Current Limit
In the event the PROG pin gets shorted to GND, the LTC4425
limits the PROG pin current to approximately 3mA which,
in turn, limits the maximum charge current to about 3A.
While in short-circuit, if one of the supercaps approaches
within 50mV of its maximum allowable voltage, V
a current-limit foldback circuit cuts back the short-circuit
current limit to approximately 1/10 of its full value or to
about 300mA.
Supply Status Monitor
The LTC4425 includes an input power-fail comparator, PFC,
which monitors the input voltage V
time, if V
threshold, it reports the undervoltage situation by pulling
down the open-drain output PFO low. This under-voltage
threshold is programmed by connecting an external resis-
tor divider network (consisting of R
V
R
the bottom end of R
complete the divider network. When the part is disabled,
this transistor opens R
current drawn by the divider network. The power-fail com-
parator has a built-in fi lter to reject any transient supply
glitch that is less than 10μS long.
CLAMP
IN
DS(ON)
and the PFI_RET pins. When the part is enabled, a low
, the main charger FET completely shuts off and
(approx. 13Ω) internal pull-down transistor pulls
IN
falls below a certain externally program-mable
PF2
PF2
, i.e., the PFI_RET pin to GND to
from GND, thereby saving the
IN
PF1
via the PFI pin. At any-
andR
OUT
PF2
) between
. However
MID
CLAMP,
4425f
pin

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