MAX8792ETD+T Maxim Integrated Products, MAX8792ETD+T Datasheet - Page 25

• Manufacturer Part Number: MAX8792ETD+T
• Description: IC PWM CONTROLLER 14TDFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8792ETD+T

• Applications: PWM Controller
• Voltage - Input: 2 ~ 26 V
• Current - Supply: 700µA
• Operating Temperature: -40°C ~ 80°C
• Mounting Type: Surface Mount
• Package / Case: 14-TDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

rough estimate and is no substitute for breadboard
evaluation, preferably including verification using a
thermocouple mounted on N
where C
Q
FET, and I
rent (2.2A typ).
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the C
x V
MOSFET chosen for adequate R
voltages becomes extraordinarily hot when biased from
V
lower parasitic capacitance.
For the low-side MOSFET (N
dissipation always occurs at maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, you can “overdesign” the
circuit to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good size heatsink to handle the overload
power dissipation.
Choose a Schottky diode (D
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. Select a
diode that can handle the load current during the dead
times. This diode is optional and can be removed if effi-
ciency is not critical.
LOAD(MAX)
IN(MAX)
G(SW)
PD N
PD N
IN
2
(
(
x f
L
VALLEY(MAX)
is the charge needed to turn on the N
I
OSS
H
LOAD
, consider choosing another MOSFET with
SW
Re
GATE
, but are not quite high enough to exceed
Switching
sistive
is the N
switching-loss equation. If the high-side
=
=
I
is the peak gate-drive source/sink cur-
I
VALLEY MAX
VALLEY MAX
______________________________________________________________________________________
)
=
)
C
H
⎡
⎢
⎢
⎣
=
is the maximum valley current
1
OSS IN SW
(
−
(
V
MOSFET’s output capacitance,
IN MAX LOAD SW
⎛
⎜
⎝
(
V
V
2
IN MAX
V
H
)
)
OUT
L
(
+
+
:
L
2
) with a forward voltage
), the worst-case power
f
⎛
⎜
⎝
)
Δ
I
I
2
LOAD MAX
I
L
DS(ON)
)
⎞
⎟
⎠
⎤
⎥
⎥
⎦
(
f
I
(
LOAD
2
Controller with Dynamic REFIN
⎛
⎜
⎝
at low battery
Q
)
I
LIR
GATE
)
G SW
Single Quick-PWM Step-Down
2
(
R
⎞
⎟
⎠
DS ON
H
)
MOS-
(
⎞
⎟ +
⎠
)
The boost capacitors (C
enough to handle the gate charging requirements of
the high-side MOSFETs. Typically, 0.1µF ceramic
capacitors work well for low- power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side, MOSFETs require
boost capacitors larger than 0.1µF. For these applica-
tions, select the boost capacitors to avoid discharging
the capacitor more than 200mV while charging the
high-side MOSFETs’ gates:
where N is the number of high-side MOSFETs used for
one regulator, and Q
in the MOSFET’s data sheet. For example, assume (2)
IRF7811W n-channel MOSFETs are used on the high
side. According to the manufacturer’s data sheet, a sin-
gle IRF7811W has a maximum gate charge of 24nC
(V
boost capacitance would be:
Selecting the closest standard value, this example
requires a 0.22µF ceramic capacitor.
The output voltage-adjustable range for continuous-
conduction operation is restricted by the nonadjustable
minimum off-time one-shot. For best dropout perfor-
mance, use the slower (200kHz) on-time settings. When
working with low-input voltages, the duty-factor limit
must be calculated using worst-case values for on- and
off-times. Manufacturing tolerances and internal propa-
gation delays introduce an error to the on-times. This
error is greater at higher frequencies. Also, keep in
mind that transient response performance of buck reg-
ulators operated too close to dropout is poor, and bulk
output capacitance must often be added (see the V
equation in the Quick-PWM Design Procedure section).
The absolute point of dropout is when the inductor cur-
rent ramps down during the minimum off-time (ΔI
as much as it ramps up during the on-time (ΔI
ratio h = ΔI
slew the inductor current higher in response to
increased load, and must always be greater than 1. As
h approaches 1, the absolute minimum dropout point,
the inductor current cannot increase as much during
each switching cycle and V
unless additional output capacitance is used.
GS
= 5V). Using the above equation, the required
Minimum Input-Voltage Requirements
UP
/ ΔI
C
BST
DOWN
C
BST
=
GATE
and Dropout Performance
2 24
200
×
=
is an indicator of the ability to
BST
N Q
is the gate charge specified
mV
nC
×
200
) must be selected large
SAG
GATE
=
mV
Boost Capacitors
0 24
.
greatly increases
μ
F
UP
DOWN
). The
SAG
25
)