LM96000CIMT/NOPB National Semiconductor, LM96000CIMT/NOPB Datasheet - Page 29

• Manufacturer Part Number: LM96000CIMT/NOPB
• Description: IC HDWR MON W/FAN CTRL 24-TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM96000CIMT/NOPB

• Function: Fan Control, Temp Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: 0°C ~ 85°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Ic Output Type: Digital
• Sensing Accuracy Range: ± 2.5°C
• Temperature Sensing Range: 0°C To +85°C
• Supply Current: 530µA
• Supply Voltage Range: 3V To 3.6V
• Resolution (bits): 8bit
• Sensor Case Style: TSSOP
• No. Of Pins: 24
• Rohs Compliant: Yes
• Accuracy %: 3°C
• For Use With: LM96000EVAL - BOARD EVALUATION LM96000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM96000CIMT; *LM96000CIMT/NOPB; LM96000CIMT

Register
Address
This register is not effected when the Ready/Lock/Start/Override register Lock bit is set. After power up the default value is used
whenever the Ready/Lock/Start/Override register Start bit is cleared even though modifications to this register are possible.
4.22.2 Register 75h: Fan Spin-up Mode
The PWM SU bit configures the PWM spin-up mode. If PWM SU is cleared the spin-up time will terminate after time programmed
by the Fan Configuration register has elapsed. When set to a 1, the spin-up time will terminate early if the TACH reading exceeds
the Tach Minimum value or after the time programmed by the Fan Configuration register has elapsed, whichever occurs first.
This register becomes Read Only when the Ready/Lock/Start/Override register Lock bit is set. Any further attempts to write to this
register shall have no effect. After power up the default value is used whenever the Ready/Lock/Start/Override register Start bit is
cleared even though modifications to this register are possible.
4.23 Undefined Registers
Any reads to undefined registers will always return 00h. Writes to undefined registers will have no effect and will not return an error.
• Mode 0:
• Mode 1:
• Mode 2:
• Mode 3:
75h
Setting (Tn[1:0]) Mode Function
PWM Frequency
00
01
10
11
Read/
Write
R/W
10.01
15.02
23.14
30.04
38.16
47.06
61.38
94.12
This mode uses the conventional method for fan tachometer pulse detection and does not include any circuitry to
compensate for PWM Fan drive. This mode should be used when PWM drive is not used to power the fan. This
mode may report a false RPM reading when under minimum detectable RPM as shown in the following table.
This mode uses the conventional method for fan tach detection. The reading will be FFFFh if it is below minimum
detectable RPM.
This mode is optimized for accurate RPM readings and activates circuitry that extends the lower side of the RPM
reading as shown in the following table.
This mode minimizes the effect on the RPM setting and activates circuitry that extends the lower side of the RPM
reading as shown in the following table.
Fan Spin-up Mode
0
1
2
3
Register
Name
Traditional tach input monitor, false readings when under minimum detctable RPM
Traditional tach input monitor, FFFFh reading when under minimum detectable RPM
Most accurate readings, FFFFh reading when under minimum detectable RPM
Least effect on programmed PWM of Fan, FFFFh reading when under minimum detectable RPM
Mode 0 and 1 Minimum RPM
(MSB)
Bit 7
RES
Bit 6 Bit 5 Bit 4 Bit 3
RES RES RES RES PWM3 SU
1262
1944
2523
3205
3953
5156
7906
841
29
Bit 2
Mode 2 and 3 Minimum RPM
210
315
420
420
420
420
420
420
PWM2 SU
Bit 1
PWM1 SU
(LSB)
Bit 0
Default
Value
7h
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