MAX6692MUA+ Maxim Integrated Products, MAX6692MUA+ Datasheet - Page 8

• Manufacturer Part Number: MAX6692MUA+
• Description: IC SENSOR REMOTE SMBUS 8UMAX
• Manufacturer: Maxim Integrated Products

Specifications of MAX6692MUA+

• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: 0°C ~ 125°C, External Sensor
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Full Temp Accuracy: +/- 3 C
• Digital Output - Bus Interface: Serial (2-Wire)
• Digital Output - Number Of Bits: 10 bit + Sign
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Precision SMBus-Compatible Remote/Local
Temperature Sensors with Overtemperature Alarms
Four registers store ALERT threshold values—one high-
temperature (T
register each for the local and remote channels. If
either measured temperature equals or exceeds the
corresponding ALERT threshold value, the ALERT inter-
rupt asserts.
The power-on-reset (POR) state of both ALERT T
registers is full scale (0101 0101, or +85°C). The POR
state of both T
Two additional registers store remote and local alarm
threshold data corresponding to the OVERT output. The
values stored in these registers are high-temperature
thresholds. If either of the measured temperatures
equals or exceeds the corresponding alarm threshold
value, an OVERT output asserts. The POR state of the
OVERT threshold is 0110 1110 or +110°C for the
MAX6648, and 0101 0101 or +85°C for the MAX6692.
A continuity fault detector at DXP detects an open cir-
cuit between DXP and DXN, or a DXP short to V
GND, or DXN. If an open or short circuit exists, the
external temperature register is loaded with 1000 0000.
If the fault is an open-circuit fault bit 2 (OPEN) of the
status byte, it is set to 1 and the ALERT condition is
activated at the end of the conversion. Immediately
after POR, the status register indicates that no fault is
present. If a fault is present upon power-up, the fault is
not indicated until the end of the first conversion.
The ALERT interrupt occurs when the internal or exter-
nal temperature reading exceeds a high- or low-tem-
perature limit (user programmed) or when the remote
diode is disconnected (for continuity fault detection).
Figure 3. SMBus Read Timing Diagram
8
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
SMBCLK
SMBDATA
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
t
SU:STA
LOW
HIGH
A
t
HD:STA
registers is 0000 0000, or 0°C.
) and one low-temperature (T
Alarm Threshold Registers
t
LOW
B
t
HIGH
Diode Fault Alarm
ALERT Interrupts
t
SU:DAT
C
E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
D
LOW
HIGH
CC
E
)
,
F
The ALERT interrupt output signal is latched and can
be cleared only by either reading the status register or
by successfully responding to an alert response
address. In both cases, the alert is cleared only if the
fault condition no longer exists. Asserting ALERT does
not halt automatic conversion. The ALERT output pin is
open drain, allowing multiple devices to share a com-
mon interrupt line.
The MAX6648/MAX6692 respond to the SMBus alert
response address, an interrupt pointer return-address
feature (see the Alert Response Address section). Prior
to taking corrective action, always check to ensure that
an interrupt is valid by reading the current temperature.
In some systems, it may be desirable to ignore a single
temperature measurement that falls outside the ALERT
limits. Bits 2 and 3 of the fault queue register (address
22h) determine the number of consecutive temperature
faults necessary to set ALERT (see Tables 3 and 4).
The SMBus alert response interrupt pointer provides
quick fault identification for simple slave devices that
lack the complex, expensive logic needed to be a bus
master. Upon receiving an ALERT interrupt signal, the
host master can broadcast a receive byte transmission
to the alert response slave address (0001 100).
Following such a broadcast, any slave device that gen-
erated an interrupt attempts to identify itself by putting
its own address on the bus.
The alert response can activate several different slave
devices simultaneously, similar to the I
more than one slave attempts to respond, bus arbitration
rules apply, and the device with the lower address
code wins. The losing device does not generate an
G
I = MASTER PULLS DATA LINE LOW
J = ACKNOWLEDGE CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION
M = NEW START CONDITION
H
Alert Response Address
I
Fault Queue Register
J
K
2
C general call. If
t
SU:STO
L
t
BUF
M