MCP9803-M/SN Microchip Technology, MCP9803-M/SN Datasheet - Page 17

• Manufacturer Part Number: MCP9803-M/SN
• Description: IC TEMP SNSR 12BIT 2WIRE 8-SOIC
• Manufacturer: Microchip Technology

Specifications of MCP9803-M/SN

• Package / Case: 8-SOIC (3.9mm Width)
• Output Type: I²C™/SMBus™
• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Register Bank
• Sensor Type: Internal
• Sensing Temperature: -55°C ~ 125°C
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Full Temp Accuracy: 3 C
• Digital Output - Bus Interface: Serial (2-Wire, I2C)
• Digital Output - Number Of Bits: 12 bit
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Supply Current: 200 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

5.1.5
After the start condition, each bit of data in transmission
needs to be settled for time specified by t
before SCLK toggles from low-to-high (refer to the
Serial Interface Timing Specification).
5.1.6
Each receiving device, when addressed, is obliged to
generate an acknowledge bit after the reception of
each byte. The master device must generate an extra
clock pulse for ACK to be recognized.
The acknowledging device has to pull down the SDA
line for t
SCLK from the Master and remains pulled down for
t
During read, the master must signal an End-of-Data
(EOD) to the slave by not generating an ACK bit once
the last bit has been clocked out of the slave. In this
case, the slave will leave the data line released to
enable the master to generate the stop condition.
 2004 Microchip Technology Inc.
H-DATA
after high-to-low transition of SCLK.
SU-DATA
DATA VALID
ACKNOWLEDGE (ACK)
before the low-to-high transition of
SU-DATA
5.1.7
If the SCLK stays low for time specified by t
MCP9802/03 resets the serial interface. This dictates
the minimum clock speed as specified in the SMBus
specification. The I
clock speed and, therefore, the master can hold the
clock indefinitely to process data (MCP9800/01 only).
TIME OUT (MCP9802/03)
MCP9800/1/2/3
2
C bus specification does not limit
DS21909B-page 17
OUT
, the