DS7505S+T&R Maxim Integrated Products, DS7505S+T&R Datasheet - Page 9
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DS7505S+T&R
Manufacturer Part Number
DS7505S+T&R
Description
IC DGTL THERMOMETER 2WIRE 8-SOIC
Manufacturer
Maxim Integrated Products
Datasheet
1.DS7505U.pdf
(14 pages)
Specifications of DS7505S+T&R
Function
Thermometer, Thermostat
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-55°C ~ 125°C
Output Type
I²C™/SMBus™
Output Alarm
No
Output Fan
No
Voltage - Supply
1.7 V ~ 3.7 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Maximum Operating Temperature
+ 125 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 3. Resolution Configuration
Table 4. Fault Tolerance Configuration
The four DS7505 registers each have a unique 2-bit
pointer designation, which is defined in Table 5. When
reading from or writing to the DS7505, the user must
“point” the DS7505 to the register that is to be
accessed. When reading from the DS7505, once the
pointer is set, it remains pointed at the same register
until it is changed. For example, if the user desires to
perform consecutive reads from the temperature regis-
ter, then the pointer only has to be set to the tempera-
ture register one time, after which all reads are
automatically from the temperature register until the
pointer value is changed. When writing to the DS7505,
the pointer value must be refreshed each time a write is
performed, even if the same register is being written to
twice in a row.
At power-up, the pointer defaults to the temperature
register location. The temperature register can be read
immediately without resetting the pointer.
Changes to the pointer setting are accomplished as
described in the 2-Wire Serial Data Bus section.
Table 5. Pointer Definition
Temperature
Configuration
T
T
HYST
OS
R1
F1
0
0
1
1
0
0
1
1
REGISTER
R0
F0
0
1
0
1
0
1
0
1
RESOLUTION (BITS)
THERMOMETER
_______________________________________________________________________________________
CONVERSIONS TO TRIGGER O.S.
CONSECUTIVE OUT-OF-LIMITS
10
11
12
9
Digital Thermometer and Thermostat
P1
0
0
1
1
Register Pointer
1
2
4
6
MAX CONVERSION
TIME (ms)
100
200
25
50
P0
0
1
0
1
The DS7505 communicates over a standard bidirection-
al 2-wire serial data bus that consists of a serial clock
(SCL) signal and serial data (SDA) signal. The DS7505
interfaces to the bus through the SCL input pin and
open-drain SDA I/O pin. All communication is MSB first.
The following terminology is used to describe 2-wire
communication:
Master Device: Microprocessor/microcontroller that
controls the slave devices on the bus. The master
device generates the SCL signal and START and STOP
conditions.
Slave: All devices on the bus other than the master.
The DS7505 always functions as a slave.
Bus Idle or Not Busy: Both SDA and SCL remain high.
SDA is held high by a pullup resistor when the bus is
idle, and SCL must either be forced high by the master
(if the SCL output is push-pull) or pulled high by a
pullup resistor (if the SCL output is open drain).
Transmitter: A device (master or slave) that is sending
data on the bus.
Receiver: A device (master or slave) that is receiving
data from the bus.
START Condition: Signal generated by the master to
indicate the beginning of a data transfer on the bus.
The master generates a START condition by pulling
SDA from high to low while SCL is high (see Figure 6).
A “repeated” START is sometimes used at the end of a
data transfer (instead of a STOP) to indicate that the
master performs another operation.
STOP Condition: Signal generated by the master to
indicate the end of a data transfer on the bus. The mas-
ter generates a STOP condition by transitioning SDA
from low to high while SCL is high (see Figure 6). After
the STOP is issued, the master releases the bus to its
idle state.
Acknowledge (ACK): When a device (either master or
slave) is acting as a receiver, it must generate an
acknowledge (ACK) on the SDA line after receiving
every byte of data. The receiving device performs an
ACK by pulling the SDA line low for an entire SCL peri-
od (see Figure 6). During the ACK clock cycle, the
transmitting device must release SDA. A variation on
the ACK signal is the “not acknowledge” (NACK). When
the master device is acting as a receiver, it uses a
NACK instead of an ACK after the last data byte to indi-
cate that it is finished receiving data. The master indi-
cates a NACK by leaving the SDA line high during the
ACK clock cycle.
2-Wire Serial Data Bus
9