FM75M8 Fairchild Semiconductor, FM75M8 Datasheet - Page 9

• Manufacturer Part Number: FM75M8
• Description: TEMPERATURE SENSOR LV 8SOIC
• Manufacturer: Fairchild Semiconductor

Specifications of FM75M8

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Full Temp Accuracy: 4 C
• Digital Output - Bus Interface: I2C, SMBus
• Digital Output - Number Of Bits: 9 bit to 12 bit
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Description/function: Semiconductor
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Current: 500 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2006 Fairchild Semiconductor Corporation
FM75 Rev. 1.0.8
Temperature Register
The temperature register is a two-byte (16-bit) read-only
register. Digital temperatures from the T-to-D converter
are stored in the temperature register in two’s comple-
ment format and the contents of this register are updated
at regular intervals, each time the T-to-D conversion is
finished.
The user can read data from the temperature register at
any time. When a T-to-D conversion is completed, the
new data is loaded into a comparator buffer to evaluate
fault conditions and updates the temperature register if a
read cycle is not ongoing. The FM75 is continuously
evaluating fault conditions regardless of read or write
activity on the bus. If a read is ongoing, the previous
temperature is read. The readable temperature is
updated upon the completion of the next T-to-D conver-
sion not masked by a read cycle.
The temperature register is illustrated in Figure 7.
Depending on the resolution of the T-to-D conversion,
the 9, 10, 11, or 12 MSBs of the register contain temper-
ature data. All unused bits following the digital tempera-
ture are zero. The MSB position of the temperature
register always contains the sign bit for the digital tem-
perature and bit 14 contains the temperature MSB. Bits
in the temperature register default to zero at power-up.
SB = Two’s complement sign bit
TMSB = Temperature MSB
T = Temperature data
9-bit LSB = Temperature LSB for 9-bit conversions
10-bit LSB = Temperature LSB for 10-bit conversions
11-bit LSB = Temperature LSB for 11-bit conversions
12-bit LSB = Temperature LSB for 12-bit conversions
MSB
SB
Figure 7. Temperature Register Format
9-bit
LSB
TMSB
7
14
10-bit
LSB
6
13
T
11-bit
LSB
5
12
T
12-bit
LSB
4
11
T
0
3
10
T
0
2
T
9
0
1
T
8
LSB
0
9
Configuration Register
The configuration register is a one-byte (8-bit) read/write
register (see Figure 8). This register allows the user to
control the FM75 shutdown mode as well as the follow-
ing thermal alarm features: polarity, operating mode, and
fault tolerance. The configuration register contains two
bits that set the fault tolerance trip point. The fault toler-
ance trip point is the number of consecutive times the
internal circuit reads the temperature and finds the tem-
perature outside the limits programmed. The pro-
grammed limits are defined by the T
upper limit and by the T
Table 4 shows the relationship between F1 and F0 and
the number of consecutive errors or “trips” needed to
activate the alarm. The configuration register also con-
tains the two bits that set the T-to-D conversion resolu-
tion to 9, 10, 11, or 12 bits. Table 3 shows the
relationship between R1 and T0 and the conversion res-
olution. All bits in the configuration register default to
zero at power-up.
Table 3. Conversion Resolution Settings
Table 4. Fault Tolerance Settings
R1 = Resolution bit 1 (see Table 3).
R0 = Resolution bit 0 (see Table 3).
F1 = Fault tolerance bit 1 (see Table 4).
F0 = Fault tolerance bit 0 (see Table 4).
POL = OS output polarity: 0 = active low, 1 = active
high.
CMP/INT = thermostat mode: 0 = comparator mode,
1 = inerrupt mode.
SD = shutdown: 0 = normal operation, 1 = shutdown
mode.
MSB
Conversion Resolution
X R1 R0 F1 F0
Figure 8. Configuration Register Format
Fault Tolerance
6
A-to-D
10 Bits
11 Bits
12 Bits
9 Bits
1
2
4
6
5
4
HYST
register for the lower limit.
3
POL
2
OS
R1
R1
CMP/
0
0
1
1
0
0
1
1
INT
register for the
1
www.fairchildsemi.com
LSB
SD
R0
R0
0
1
0
1
0
1
0
1