ADT7316ARQ Analog Devices Inc, ADT7316ARQ Datasheet - Page 30

• Manufacturer Part Number: ADT7316ARQ
• Description: IC DGTL TEMP SNSR QUAD DAC16QSOP
• Manufacturer: Analog Devices Inc

Specifications of ADT7316ARQ

• Rohs Status: RoHS non-compliant
• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 120°C, External Sensor
• Output Type: I²C™, MICROWIRE™, QSPI™, SMBus™, SPI™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 120°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• For Use With: EVAL-ADT7316EBZ - BOARD EVAL FOR ADT7316
• Lead Free Status / RoHS Status: Not Compliant

ADT7316/ADT7317/ADT7318
DAC D Register LSBs (Read/Write) [Address 0x16]
This 8-bit read/write register contains the 4/2 LSBs of the
ADT7316/ADT7317 DAC D word, respectively. The value in
this register is combined with the value in the DAC D register
MSBs and converted to an analog voltage on the V
On power-up, the voltage output on the V
Table 31. DAC D (ADT7316) LSBs
D7
B3
0
1
Table 32. DAC D (ADT7317) LSBs
D7
B1
0
1
DAC D Register MSBs (Read/Write) [Address 0x17]
This 8-bit read/write register contains the 8 MSBs of the DAC D
word. The value in this register is combined with the value in
the DAC D register LSBs and converted to an analog voltage on
the V
pin is 0 V.
Table 33. DAC D MSBs
D7
MSB
0
1
Control Configuration 1 Register (Read/Write)
[Address 0x18]
This configuration register is an 8-bit read/write register that
is used to setup some of the operating modes of the ADT7316/
ADT7317/ADT7318.
Table 34. Control Configuration 1
D7
PD
0
1
Default settings at power-up.
Default settings at power-up.
Default settings at power-up.
Default settings at power-up.
1
1
1
1
OUT
D6
LSB
0
D6
B2
0
D6
C6
0
-D pin. On power-up, the voltage output on the V
1
1
1
D6
B8
0
1
D5
B1
0
D5
N/A
N/A
1
D5
C5
0
1
D5
B7
0
1
D4
LSB
0
D4
N/A
N/A
1
D4
C4
0
1
D4
B6
0
1
D3
N/A
N/A
D3
N/A
N/A
D3
C3
0
D3
B5
0
1
1
D2
N/A
N/A
D2
N/A
N/A
OUT
D2
C2
0
D2
B4
0
1
1
-D pin is 0 V.
D1
N/A
N/A
D1
N/A
N/A
D1
C1
0
OUT
D1
B3
0
1
1
-D pin.
D0
N/A
N/A
OUT
D0
N/A
N/A
D0
C0
0
D0
B2
0
1
1
Rev. B | Page 30 of 44
-D
Table 35. Control Configuration 1 Bit Descriptions
Bit
C0
C1:4
C5
C6
PD
Control Configuration 2 Register (Read/Write)
[Address 0x19]
This configuration register is an 8-bit, read/write register that
is used to set up some of the operating modes of the ADT7316/
ADT7317/ADT7318.
Table 36. Control Configuration 2
D7
C7
0
1
Table 37. Control Configuration 2
Bit
C0:1
C2:3
C4
C5
C6
C7
Default settings at power-up.
1
Function
This bit enables/disables conversions in round robin
1 = Start monitoring.
Reserved. Only write 0s.
0 = Enable INT/INT output. 1 = Disable INT/INT output.
Configures INT/INT output polarity. 0 = Active low.
Power-Down Bit. Setting this bit to 1 puts the ADT7316/
mode and single-channel mode. The
ADT7316/ADT7317/ ADT7318 power up in round-robin
mode, but monitoring is not initiated until this bit is set.
0 = Stop monitoring (default).
1 = Active high.
ADT7317/ADT7318 into standby mode. In this mode,
both the ADC and the DACs are fully powered down, but
the serial interface is still operational. To power up the
part again, write 0 to this bit.
D6
C6
0
1
Function
In single-channel mode, these bits select between V
00 = V
01 = Internal temperature sensor.
10 = External temperature sensor.
11 = Reserved.
Reserved.
Selects between single-channel and round robin
0 = Round robin.
1 = Single channel.
Default condition is to average every measurement on
0 = Enable averaging.
1 = Disable averaging.
SMBus timeout on the serial clock puts a 25 ms limit
0 = Disable.
1 = Enable SMBus timeout.
Software reset. Setting this bit to 1 causes a software
the internal temperature sensor, and the external
temperature sensor for conversion.
conversion cycle. Default is round robin.
all channels 16 times. This bit disables this averaging.
Channels affected are temperature and V
on the pulse width of the clock. Ensures that a fault
on the master SCL does not lock up the SDA line.
SMBus timeout.
reset. All registers and DAC outputs reset to their
default settings.
DD
D5
C5
0
1
(default).
D4
C4
0
1
D3
C3
0
1
D2
C2
0
1
D1
C1
0
1
DD
.
D0
C0
0
1
DD
,