ADM1026JST ON Semiconductor, ADM1026JST Datasheet - Page 50

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ADM1026JST

Manufacturer Part Number
ADM1026JST
Description
IC CNTRL SYS REF/EEPROM 48LQFP
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADM1026JST

Rohs Status
RoHS non-compliant
Function
Hardware Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
0°C ~ 100°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
48-LFQFP

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Table 72. Register 3Eh, FAN6 Measured Value (Power−On Default, 00h)
Table 73. Register 3Fh, FAN7 Measured Value (Power−On Default, 00h)
Table 74. Register 40h, EXT1 HIgh Limit (Power−On Default 64h/1005C)
Table 75. Register 41h, EXT2/A
Table 76. Register 42h, 3.3 V STBY HIgh Limit (Power−On Default FFh)
Table 77. Register 43h, 3.3 V MAIN HIgh Limit (Power−On Default FFh)
Table 78. Register 44h, +5.0 V HIgh Limit (Power−On Default FFh)
Table 79. Register 45h, V
Table 80. Register 46h, +12 V HIgh Limit (Power−On Default FFh)
Table 81. Register 47h, −12 V HIgh Limit (Power−On Default FFh)
Table 82. Register 48h, EXT1 Low Limit (Power−On Default 80h)
7–0
7–0
7–0
7–0
7–0
7–0
7–0
7–0
7–0
7–0
7–0
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
3.3 V STBY High Limit
3.3 V MAIN High Limit
+5.0 V High Limit
+12 V High Limit
−12 V High Limit
V
Ext1 High Limit
A
Ext1 Low Limit
CCP
IN9
FAN6 Value
FAN7 Value
Ext2 Temp/
Name
Name
Name
Name
Name
Name
Name
Name
Name
Name
Name
High Limit
High Limit
CCP
HIgh Limit (Power−On Default FFh)
IN9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
HIgh Limit (Power−On Default 64h/1005C)
R
R
This register contains the measured value of the FAN6 tach input channel.
This register contains the measured value of the FAN7 tach input channel.
This register contains the high limit of the Ext1 Temp channel.
This register contains the high limit of the Ext2 Temp/A
which one is configured.
This register contains the high limit of the 3.3 V STBY analog input channel.
This register contains the high limit of the 3.3 V MAIN analog input channel.
This register contains the high limit of the +5.0 V analog input channel.
This register contains the high limit of the V
This register contains the high limit of the +12 V analog input channel.
This register contains the high limit of the -12 V analog input channel.
This register contains the low limit of the Ext1 Temp channel.
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Description
Description
Description
Description
Description
Description
Description
Description
Description
Description
Description
CCP
analog input channel.
IN9
channel depending on

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