AD7741BRZ Analog Devices Inc, AD7741BRZ Datasheet - Page 6

IC CONVERTER V TO FREQ 8-SOIC

AD7741BRZ

Manufacturer Part Number
AD7741BRZ
Description
IC CONVERTER V TO FREQ 8-SOIC
Manufacturer
Analog Devices Inc
Type
Voltage to Frequencyr
Datasheet

Specifications of AD7741BRZ

Frequency - Max
3.072MHz
Full Scale
±50ppm/°C
Linearity
±0.012%
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Frequency
2.75MHz
Full Scale Range
3.072MHz
Linearity %
0.01%
Supply Voltage Range
4.75V To 5.25V
Digital Ic Case Style
SOIC
No. Of Pins
8
Msl
MSL 3 - 168 Hours
Frequency Max
6.144MHz
Converter Function
VFC
Full Scale Frequency
1350
Power Supply Requirement
Single
Single Supply Voltage (typ)
5V
Single Supply Voltage (max)
5.25V
Single Supply Voltage (min)
4.75V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7741/42EBZ - BOARD EVAL FOR AD7741/7742
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7741BRZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7741BRZ-REEL7
Manufacturer:
AD
Quantity:
3 400
AD7741/AD7742
Pin No.
1
2
3
4–5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
f
V
GND
A1, A0
CLKOUT
CLKIN
UNI/BIP
REFOUT
REFIN
V
V
V
V
GAIN
PD
OUT
DD
IN
IN
IN
IN
1
2
3
4
Function
Frequency Output. This pin provides the output of the synchronous VFC.
Power Supply Input. These parts can be operated from +4.75 V to +5.25 V and the supply should be
adequately decoupled to GND.
Ground reference point for all circuitry on the part.
Address Inputs used to select the input channel configuration.
External Clock Output. When the master clock for the device is a crystal, the crystal is connected be-
tween CLKIN and CLKOUT. When an external clock is applied to CLKIN, the CLKOUT pin
provides an inverted clock signal. This clock should be buffered if it is to be used as a clock source
elsewhere in the system.
External Clock Input. The master clock for the device can be provided in the form of a crystal or an
external clock. A crystal may be tied across the CLKIN and CLKOUT pins. Alternatively, the CLKIN
pin may be driven by a CMOS-compatible clock and CLKOUT left unconnected. The frequency of the
master clock may be as high as 6 MHz.
Control input which determines whether the device operates with differential bipolar analog input
signals or differential unipolar analog input signals.
2.5 V Voltage Reference Output. This can be tied directly to REFIN. It may also be used as a reference
to other parts of the system provided it is buffered first.
This is the Reference Input to the core of the VFC and defines the span of the VFC. A 2.5 V reference
is required at this pin. This may be provided by connecting it directly to REFOUT or by using a preci-
sion external reference (e.g., REF192).
Buffered Analog Input Channel 1. This is either a pseudo-differential input with respect to V
the positive input of a truly-differential input pair with respect to V
Buffered Analog Input Channel 2. This is either a pseudo-differential input with respect to V
the negative input of a truly-differential input pair with respect to V
Buffered Analog Input Channel 3. This is the positive input of a truly-differential input pair with re-
spect to V
Buffered Analog Input Channel 4. This is either the common for pseudo-differential input with respect
to V
Gain Select input that controls whether the gain on the analog front-end is X1 or X2.
Active Low Power-Down pin. When this input is low, the part enters power-down mode where it typi-
cally consumes 25 A of current.
IN
1 or V
IN
4.
IN
2 or it is the negative input of a truly-differential input pair with respect to V
AD7742 PIN FUNCTION DESCRIPTION
CLKOUT
UNI/BIP
CLKIN
PIN CONFIGURATION
GND
f
V
OUT
DD
A1
A0
1
2
3
4
5
6
7
8
(Not to Scale)
TOP VIEW
AD7742
–6–
16
15
14
13
12
11
10
9
PD
GAIN
V
V
V
V
REFIN
REFOUT
IN
IN
IN
IN
4
3
2
1
IN
IN
2.
1.
IN
3.
IN
IN
4 or it is
4 or it is
REV. 0

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