AD586LRZ Analog Devices Inc, AD586LRZ Datasheet - Page 6

• Manufacturer Part Number: AD586LRZ
• Description: IC PREC V-REF 5V LN 8-SOIC
• Manufacturer: Analog Devices Inc
• Type: Voltage Referencer

Specifications of AD586LRZ

• Temperature Coefficient: 5ppm/°C
• Reference Type: Series
• Voltage - Output: 5V
• Tolerance: ±2.5mV
• Voltage - Input: 10.8 ~ 36 V
• Number Of Channels: 1
• Current - Quiescent: 3.0mA
• Current - Output: 10mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Topology: Series
• Input Voltage: 10.8V To 36V
• Reference Voltage: 5V
• Reference Voltage Tolerance: 2.5mV
• Voltage Reference Case Style: SOIC
• No. Of Pins: 8
• Current, Output: 10 mA
• Current, Supply: 2 mA
• Package Type: SOIC-8
• Power Dissipation: 500 mW
• Regulation, Line: ±100 μV/V
• Regulation, Load: 100 μV/V
• Regulator Type: Negative Voltage Out
• Resistance, Thermal, Junction To Case: 22 °C/W
• Temperature, Operating, Range: 0 to +70 °C
• Voltage, Input: 15 V
• Voltage, Noise: 4 μVp-p
• Voltage, Offset: ≤2 mV
• Voltage, Output: 5.0025 V
• Voltage, Supply: 15 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Cathode: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

AD586
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
SHOULD BE MADE TO THESE POINTS.
GND
TP
TP
Figure 2. Pin Configuration (N-8)
V
IN
1
1
Mnemonic
TP
V
TP
GND
TRIM
V
TP
NOICE REDUCTION
1
2
3
4
IN
OUT
(Not to Scale)
1
1
1
TOP VIEW
AD586
8
7
6
5
NOISE
REDUCTION
TP
V
TRIM
OUT
1
Description
Factory Trim Pad (No Connect).
Input Voltage.
Factory Trim Pad (No Connect).
Ground.
Optional External Fine Trim. See the Applying the AD586 section.
Output Voltage.
Factory Trim Pad (No Connect).
Optional Noise Reduction Filter with External 1µF Capacitor to Ground.
1
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
SHOULD BE MADE TO THESE POINTS.
GND
Figure 3. Pin Configuration (Q-8)
TP
TP
V
IN
1
1
1
2
3
4
Rev. G | Page 6 of 16
(Not to Scale)
TOP VIEW
AD586
8
7
6
5
NOISE
REDUCTION
TP
V
TRIM
OUT
1
1
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
SHOULD BE MADE TO THESE POINTS.
GND
TP
TP
Figure 4. Pin Configuration (R-8)
V
IN
1
1
1
2
3
4
(Not to Scale)
TOP VIEW
AD586
8
7
6
5
NOISE
REDUCTION
TP
V
TRIM
OUT
1