LT1575CS8-3.5#PBF Linear Technology, LT1575CS8-3.5#PBF Datasheet - Page 11
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LT1575CS8-3.5#PBF
Manufacturer Part Number
LT1575CS8-3.5#PBF
Description
IC LDO REG 3.5V SINGLE 8SOIC
Manufacturer
Linear Technology
Type
Positive Fixedr
Datasheet
1.LT1575CN8-2.8.pdf
(20 pages)
Specifications of LT1575CS8-3.5#PBF
Number Of Outputs
1
Voltage - Output
3.5V
Current - Supply
12mA
Voltage - Input
10 ~ 20 V
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
APPLICATIONS
Reference voltage accuracy for the adjustable version and
output voltage accuracy for the fixed voltage versions are
specified as 0.6% at room temperature and as 1% over
the full operating temperature range. This places the
LT1575/LT1577 family among a select group of regulators
with a very tightly specified output voltage tolerance. The
accurate 1.21V reference is tied to the noninverting input
of the main error amplifier in the feedback control loop.
The error amplifier consists of a single high gain g
with a transconductance equal to 15 millimhos. The
inverting terminal is brought out as the FB pin in the
adjustable voltage version and as the OUT pin in fixed
voltage versions. The g
single ended conversion at the COMP pin. The output
impedance of the g
of typical DC error amplifier open-loop gain is realized
along with a typical 75MHz uncompensated unity-gain
crossover frequency. Note that the overall feedback
loop’s DC gain decreases from the gain provided by the
error amplifier by the attenuation factor in the resistor
divider network which sets the DC output voltage. These
attenuation factors are already built into the Open-Loop
Voltage Gain specifications for the LT1575 fixed voltage
versions in the Electrical Characteristics table to simplify
user calculations. External access to the high impedance
gain node of the error amplifier permits typical loop
compensation to be accomplished with a series RC
network to ground.
A high speed, high current output stage buffers the COMP
node and drives up to 5000pF of “effective” MOSFET gate
capacitance with almost no change in load transient per-
formance. The output stage delivers up to 50mA peak
when slewing the MOSFET gate in response to load
current transients. The typical output impedance of the
GATE pin is typically 2 . This pushes the pole due to the
error amplifier output impedance and the MOSFET input
capacitance well beyond the loop crossover frequency. If
the capacitance of the MOSFET used is less than 1500pF,
it may be necessary to add a small value series gate
resistor of 2 to 10 . This gate resistor helps damp the
LC resonance created by the MOSFET gate’s lead induc-
tance and input capacitance. In addition, the pole formed
by this resistance and the MOSFET input capacitance can
be fine tuned.
m
U
stage is about 1M and thus, 84dB
m
INFORMATION
U
stage provides differential-to-
W
U
m
stage
Because the MOSFET pass transistor is connected as a
source follower, the power path gain is much more pre-
dictable than designs that employ a discrete PNP transis-
tor as the pass device. This is due to the significant
production variations encountered with PNP Beta.
MOSFETs are also very high speed devices which enhance
the ability to produce a stable wide bandwidth control
loop. An additional advantage of the follower topology is
inherently good line rejection. Input supply disturbances
do not propagate through to the output. The feedback loop
for a regulator circuit is completed by providing an error
signal to the FB pin in the adjustable voltage version and
the OUT pin in the fixed voltage version. In both cases, a
resistor divider network senses the output voltage and
sets the regulated DC bias point. In general, the LT1575
regulator feedback loop permits a loop crossover fre-
quency on the order of 1MHz while maintaining good
phase and gain margins. This unity-gain frequency is a
factor of 20 to 30 times the bandwidth of currently
implemented regulator solutions for microprocessor power
supplies. This significant performance benefit is what
permits the elimination of all bulk output capacitance.
Several other unique features are included in the design
that increase its functionality and robustness. These func-
tions comprise the remainder of the block diagram.
A high side sense, current limit amplifier provides active
current limiting for the regulator. The current limit ampli-
fier uses an external low value shunt resistor connected in
series with the external MOSFET’s drain. This resistor can
be a discrete shunt resistor or can be manufactured from
a Kelvin-sensed section of “free” PC board trace. All load
current flows through the MOSFET drain and thus, through
the sense resistor. The advantage of using high side
current sensing in this topology is that the MOSFET’s gain
and the main feedback loop’s gain remain unaffected. The
sense resistor develops a voltage equal to I
The current limit amplifier’s 50mV threshold voltage is a
good compromise between power dissipation in the sense
resistor, dropout voltage impact and noise immunity.
Current limit activates when the sense resistor voltage
equals the 50mV threshold.
Two events occur when current limit activates: the first is
that the current limit amplifier drives Q2 in the block
LT1575/LT1577
OUT
(R
11
SENSE
).