FSQ0165RN Fairchild Semiconductor, FSQ0165RN Datasheet - Page 14

• Manufacturer Part Number: FSQ0165RN
• Description: IC PWM FLYBCK ISO CM 8DIP
• Manufacturer: Fairchild Semiconductor

Specifications of FSQ0165RN

• Output Isolation: Isolated
• Voltage - Input: 9 V ~ 20 V
• Voltage - Output: 650V
• Power (watts): 15W
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Voltage - Supply: 9 V ~ 20 V
• Frequency-max: 95.2kHz
• Number Of Outputs: 1
• Pwm Type: Current Mode
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Power Switch Family: FSQ0165
• Power Switch On Resistance: 8Ohm
• Output Current: 800mA
• Mounting: Through Hole
• Supply Current: 3mA
• Package Type: PDIP W
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Pin Count: 8
• Power Dissipation: 1.5W
• On Resistance (max): 10 Ohms
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 25 C
• Maximum Power Dissipation: 1500 mW
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Duty Cycle: -
• Lead Free Status / Rohs Status: Compliant

FSQ0365, FSQ0265, FSQ0165, FSQ321, FSQ311 Rev. 1.0.5
© 2006 Fairchild Semiconductor Corporation
4.3 Over-Voltage Protection (OVP): If the secondary
side feedback circuit malfunctions or a solder defect
causes an opening in the feedback path, the current
through the opto-coupler transistor becomes almost
zero. Then, V
overload situation, forcing the preset maximum current
to be supplied to the SMPS until the overload protection
triggers. Because more energy than required is provided
to the output, the output voltage may exceed the rated
voltage before the overload protection triggers, resulting
in the breakdown of the devices in the secondary side.
To prevent this situation, an OVP circuit is employed. In
general, the peak voltage of the sync signal is
proportional to the output voltage and the FSQ-series
uses a sync signal instead of directly monitoring the
output voltage. If the sync signal exceeds 6V, an OVP is
triggered, shutting down the SMPS. To avoid undesired
triggering of OVP during normal operation, the peak
voltage of the sync signal should be designed below 6V.
4.4 Thermal Shutdown (TSD): The SenseFET and the
control IC are built in one package. This makes it easy
for the control IC to detect the abnormal over
temperature of the SenseFET. If the temperature
exceeds ~150°C, the thermal shutdown triggers.
5. Soft-Start: The FPS has an internal soft-start circuit
that increases PWM comparator inverting input voltage
with the SenseFET current slowly after it starts up. The
typical soft-start time is 15ms, The pulse width to the
power switching device is progressively increased to
establish the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention of
smoothly establishing the required output voltage. This
mode helps prevent transformer saturation and reduces
stress on the secondary diode during startup.
6. Burst Operation: To minimize power dissipation in
standby mode, the FPS enters burst-mode operation. As
the load decreases, the feedback voltage decreases. As
shown in Figure 26, the device automatically enters
burst-mode when the feedback voltage drops below
V
output voltages start to drop at a rate dependent on
standby current load. This causes the feedback voltage
to rise. Once it passes V
resumes. The feedback voltage then falls and the
process repeats. Burst-mode operation alternately
enables and disables switching of the power SenseFET,
thereby reducing switching loss in standby mode.
BURL
(350mV). At this point, switching stops and the
FB
climbs up in a similar manner to the
BURH
(550mV), switching
14
7. Switching Frequency Limit: To minimize switching
loss and EMI (Electromagnetic Interference), the
MOSFET turns on when the drain voltage reaches its
minimum value in valley switching operation. However,
this causes switching frequency to increases at light load
conditions. As the load decreases, the peak drain current
diminishes and the switching frequency increases. This
results in severe switching losses at light-load condition,
as well as intermittent switching and audible noise.
Because of these problems, the valley switching
converter topology has limitations in a wide range of
applications.
To overcome this problem, FSQ-series employs a
frequency-limit function, as shown in Figures 27 and 28.
Once the SenseFET is turned on, the next turn-on is
prohibited during the blanking time (t
blanking time, the controller finds the valley within the
detection time window (t
shown in Figures 27 and 28 (Cases A, B, and C). If no
valley is found during t
to turn on at the end of t
devices have a minimum switching frequency of 55kHz
and a maximum switching frequency of 67kHz, as shown
in Figure 28.
FSQ0365RN Rev.00
0.55V
0.35V
V
V
V
I
V
DS
FB
DS
O
set
O
Figure 26. Waveforms of Burst Operation
t1
Switching
disabled
W
, the internal SenseFET is forced
W
) and turns on the MOSFET, as
W
t2 t3
(Case D). Therefore, our
Switching
disabled
B
www.fairchildsemi.com
). After the
t4
time