LT1952EGN#PBF Linear Technology, LT1952EGN#PBF Datasheet - Page 16

IC CTLR PWM SGL SWITCH 16-SSOP

LT1952EGN#PBF

Manufacturer Part Number
LT1952EGN#PBF
Description
IC CTLR PWM SGL SWITCH 16-SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LT1952EGN#PBF

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
560kHz
Duty Cycle
90%
Voltage - Supply
9.25 V ~ 25 V
Buck
No
Boost
No
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 125°C
Package / Case
16-SSOP
Frequency-max
560kHz
Number Of Pwm Outputs
1
On/off Pin
No
Adjustable Output
No
Topology
Flyback/Forward
Switching Freq
80 TO 560kHz
Operating Supply Voltage (max)
25V
Synchronous Pin
Yes
Rise Time
50ns
Fall Time
30ns
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
16
Package Type
SSOP N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIONS INFORMATION
LT1952/LT1952-1
Example calculation for (2)
Note 1: To achieve the same maximum duty cycle clamp at
100kHz as calculated for 200kHz, the SS_MAXDC voltage
should be reprogrammed by:
Note 2 : To achieve the same maximum duty cycle clamp
while synchronizing to an external clock at the SYNC pin,
the SS_MAXDC voltage should be re-programmed as:
Programming Soft-Start Timing
The LT1952/LT1952-1 have built-in soft-start capability to
provide low stress controlled start-up from a list of fault
conditions that can occur in the application (see Figure 1
and Figure 10). The LT1952/LT1952-1 provide true PWM
soft-start by using the SS_MAXDC pin to control soft-start
timing. The proportional relationship between SS_MAXDC
voltage and switch maximum duty cycle clamp allows
the SS_MAXDC pin to slowly ramp output voltage by
ramping the maximum switch duty cycle clamp—until
switch duty cycle clamp seamlessly meets the natural duty
cycle of the converter. A capacitor C
pin and the resistor divider from V
16
For R
R
this gives SS_MAXDC(DC) = 1.84V, t
and k = 1
Maximum Duty Cycle Clamp
= 1 • 0.522(1.84/1.32) – (40ns • 200kHz)
= 0.728 – 0.008 = 0.72 (Duty Cycle Clamp = 72%)
SS_MAXDC(DC) (100kHz)
= SS_MAXDC(DC) (200kHz) • k (200kHz)/k (100kHz)
= 1.84 • 1.0/1.055 = 1.74V (k = 1.055 for 100kHz)
SS_MAXDC (DC) (fsync)
= SS_MAXDC (DC) (200kHz) • [(fosc/fsync) +
0.09(fosc/200kHz)0.6]
For SS_MAXDC (DC) (200kHz) = 1.84V for 72%
duty cycle
SS_MAXDC (DC) (fsync = 250kHz) for 72%
duty cycle
= 1.84 • [(200kHz/250kHz) + 0.09(1)0.6]
= 1.638V
DELAY
T
= 35.7k, R
= 40k, f
OSC
B
= 100k, V
= 200kHz and SD_V
REF
SS
= 2.5V,
REF
on the SS_MAXDC
used to program
DELAY
SEC
= 40ns
= 1.32V,
maximum switch duty cycle clamp, determine soft-start
timing (Figure 11).
A soft-start event is triggered for the following faults:
(1) V
(2) SD_V
(3) OC > 107mV (overcurrent condition)
When a soft-start event is triggered, switching at SOUT
and OUT is stopped immediately. A soft-start latch is set
and SS_MAXDC pin is discharged. The SS_MAXDC pin can
only recharge when the soft-start latch has been reset.
Note: A soft-start event caused by (1) or (2) above, also
causes V
Soft-start latch reset requires all of the following:
SS_MAXDC
SS_MAXDC
SS_MAXDC
SS_MAXDC
C
IN
SOFT-START
SOFT-START
EVENT TRIGGERED
EVENT TRIGGERED
SS
< 8.75V, or
REF
SEC
Figure 11. Programming Soft-Start Timing
R
B
R
T
to be disabled and to fall to ground.
< 1.32V (UVLO), or
SS_MAXDC CHARGING MODEL
SS_MAXDC(DC) = V
R
Figure 10. Soft-Start Timing
SS_MAXDC
V
CHARGE
REF
LT1952-1
LT1952/
= [R
TIMING (A): SOFT START FAULT REMOVED
TIMING (A): SOFT START FAULT REMOVED
BEFORE SS_MAXDC FALLS TO 0.45V
BEFORE SS_MAXDC FALLS TO 0.45V
TIMING (B): SOFT-START FAULT REMOVED
TIMING (B): SOFT-START FAULT REMOVED
AFTER SS_MAXDC FALLS PAST 0.45V
AFTER SS_MAXDC FALLS PAST 0.45V
T
• R
B
SS_MAXDC(DC)
/(R
REF
T
[R
+ R
B
/(R
B
)]
R
CHARGE
T
+ R
0.8V (ACTIVE THRESHOLD)
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.45V (RESET THRESHOLD)
0.8V (ACTIVE THRESHOLD)
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.45V (RESET THRESHOLD)
0.2V
0.2V
B
)]
C
SS
SS_MAXDC
LT1952-1
LT1952/
1952 F10
1952 F10
19521fd
1952 F11

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