LT1247CS8#TR Linear Technology, LT1247CS8#TR Datasheet - Page 8

• Manufacturer Part Number: LT1247CS8#TR
• Description: IC PWM CM 8SOIC
• Manufacturer: Linear Technology

Specifications of LT1247CS8#TR

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 1MHz
• Duty Cycle: 100%
• Voltage - Supply: 8.2 V ~ 25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: 0°C ~ 100°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 1MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LT1246/LT1247
A
inverting input (pin 2) and the output (pin 1) are made
available to the user. The output voltage in a regulator
circuit is normally fed back to the inverting input of the
error amplifier through a resistive divider. The output of
the error amplifier is made available for external loop
compensation. The output current of the error amplifier is
limited to approximately 0.8mA sourcing and approxi-
mately 6mA sinking.
In a current mode PWM the peak switch current is a
function of the output voltage of the error amplifier. In the
LT1246/LT1247 the output of the error amplifier is offset
by two diodes (1.4V at 25 C), divided by a factor of three,
and fed to the inverting input of the current sense com-
parator. For output voltages less than 1.4V the duty cycle
of the output stage will be zero. The maximum offset that
can appear at the current sense input is limited by a 1V
clamp. This occurs when the error amplifier output reaches
4.4V at 25 C. The output of the error amplifier can be
clamped below 4.4V in order to reduce the maximum
voltage allowed across the current sensing resistor to less
than 1V. The supply current will increase by the value of
the output source current when the output voltage of the
error amplifier is clamped.
Current Sense Comparator and PWM Latch
LT1246/LT1247 are current mode controllers. Under nor-
mal operating conditions the output (pin 6) is turned on at
the start of every oscillator cycle, coincident with the rising
edge of the oscillator waveform. The output is then turned
off when the switch current reaches a threshold level
proportional to the error voltage at the output of the error
amplifier. Once the output is turned off it is latched off until
the start of the next cycle. The peak switch current is thus
proportional to the error voltage and is controlled on a
cycle by cycle basis. The peak switch current is normally
sensed by placing a sense resistor in the source lead of the
output MOSFET. This resistor converts the switch current
to a voltage that can be fed into the current sense input. For
normal operating conditions the peak inductor current,
which is equal to the peak switch current, will be equal to:
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During fault conditions the maximum threshold voltage at
the input of the current sense comparator is limited by the
internal 1V clamp at the inverting input. The peak switch
current will be equal to:
In certain applications such as high power regulators it
may be desirable to limit the maximum threshold voltage
to less than 1V in order to limit the power dissipated in the
sense resistor or to limit the short-circuit current of the
regulator circuit. This can be accomplished by clamping
the output of the error amplifier. A voltage level of
approximately 1.4V at the error amplifier output will give
a threshold voltage of 0V. A voltage level of approximately
4.4V at the output of the error amplifier will give a thresh-
old level of 1V. Between 1.4V and 4.4V the threshold
voltage will change by a factor of one third of the change
in the error amplifier output voltage. The threshold voltage
will be 0.333V for an error amplifier voltage of 2.4V. To
reduce the maximum current sense threshold to less than
1V the error amplifier output should be clamped to less
than 4.4V.
Blanking
A unique feature of the LT1246/LT1247 is the built-in
blanking circuit at the output of the current sense com-
parator. A common problem with current mode PWM
circuits is erratic operation due to noise at the current
sense input. The primary cause of noise problems is the
leading edge current spike due to transformer interwinding
capacitance and diode reverse recovery time. This current
spike can prematurely trip the current sense comparator
causing an instability in the regulator circuit. A filter at the
current sense input is normally required to eliminate this
instability. This filter will in turn slow down the current
sense loop. A slow current sense loop wil increase the
minimum pulse width which will increase the short-circuit
current in an overload condition. The LT1246/LT1247
blank (lock out) the signal at the output of the current
sense comparator for a fixed amount of time after the
switch is turned on. This prevents the PWM latch from
tripping due to the leading edge current spike. The blank-
ing time will be a function of the voltage at the feedback pin
(pin 2). The blanking time will be 60ns for normal operat-
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