ADP2300AUJZ-R7 Analog Devices Inc, ADP2300AUJZ-R7 Datasheet - Page 14

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ADP2300AUJZ-R7

Manufacturer Part Number
ADP2300AUJZ-R7
Description
IC REG SW STP-DWN NONSYNCH 6TSOT
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADP2300AUJZ-R7

Package / Case
TSOT-23-6, TSOT-6
Voltage - Supply
3 V ~ 20 V
Frequency-max
900kHz
Operating Temperature
-40°C ~ 125°C
Number Of Outputs
1
Pwm Type
Current Mode
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Primary Input Voltage
20V
No. Of Outputs
1
Output Voltage
17V
Output Current
1.2A
No. Of Pins
6
Operating Temperature Range
-40°C To +125°C
Msl
MSL 3 - 168 Hours
Peak Reflow Compatible (260 C)
Yes
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Duty Cycle
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Manufacturer
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ADP2300/ADP2301
THEORY OF OPERATION
The ADP2300/ADP2301 are nonsynchronous, step-down
dc-to-dc regulators, each with an integrated high-side power
MOSFET. A high switching frequency and ultrasmall, 6-lead
TSOT package allow small step-down dc-to-dc regulator
solutions.
The ADP2300/ADP2301 can operate with an input voltage from
3.0 V to 20 V while regulating an output voltage down to 0.8 V.
The ADP2300/ADP2301 are available in two fixed-frequency
options: 700 kHz (ADP2300) and 1.4 MHz (ADP2301).
BASIC OPERATION
The ADP2300/ADP2301 use the fixed-frequency, peak current-
mode PWM control architecture at medium to high loads, but
shift to a pulse-skip mode control scheme at light loads to reduce
the switching power losses and improve efficiency. When the
devices operate in fixed-frequency PWM mode, output regulation
is achieved by controlling the duty cycle of the integrated MOSFET.
When the devices operate in pulse-skip mode at light loads, the
output voltage is controlled in a hysteretic manner with higher
output ripple. In this mode of operation, the regulator periodically
stops switching for a few cycles, thus keeping the conversion
losses minimal to improve efficiency.
PWM MODE
In PWM mode, the ADP2300/ADP2301 operate at a fixed
frequency, set by an internal oscillator. At the start of each
oscillator cycle, the MOSFET switch is turned on, sending a
positive voltage across the inductor. The inductor current
increases until the current-sense signal crosses the peak
inductor current threshold that turns off the MOSFET switch;
this threshold is set by the error amplifier output. During the
MOSFET off time, the inductor current declines through the
external diode until the next oscillator clock pulse starts a new
cycle. The ADP2300/ADP2301 regulate the output voltage by
adjusting the peak inductor current threshold.
POWER SAVING MODE
To achieve higher efficiency, the ADP2300/ADP2301 smoothly
transition to the pulse-skip mode when the output load decreases
below the pulse-skip current threshold. When the output voltage
dips below regulation, the ADP2300/ADP2301 enter PWM mode
for a few oscillator cycles until the voltage increases to within
regulation. During the idle time between bursts, the MOSFET
switch is turned off, and the output capacitor supplies all the
output current.
Rev. A | Page 14 of 28
Since the pulse-skip mode comparator monitors the internal
compensation node, which represents the peak inductor current
information, the average pulse-skip load current threshold depends
on the input voltage (V
and the output capacitor.
Because the output voltage occasionally dips below regulation
and then recovers, the output voltage ripple in the power saving
mode is larger than the ripple in the PWM mode of operation.
BOOTSTRAP CIRCUITRY
The ADP2300/ADP2301 each have an integrated boot regulator,
which requires that a 0.1 μF ceramic capacitor (X5R or X7R) be
placed between the BST and SW pins to provide the gate drive
voltage for the high-side MOSFET. There must be at least a 1.2 V
difference between the BST and SW pins to turn on the high-side
MOSFET. This voltage should not exceed 5.5 V in case the BST
pin is supplied with an external voltage source through a diode.
The ADP2300/ADP2301 generate a typical 5.0 V bootstrap voltage
for a gate drive circuit by differentially sensing and regulating the
voltage between the BST and SW pins. A diode integrated on the
chip blocks the reverse voltage between the VIN and BST pins
when the MOSFET switch is turned on.
PRECISION ENABLE
The ADP2300/ADP2301 feature a precision enable circuit that
has a 1.2 V reference voltage with 100 mV hysteresis. When the
voltage at the EN pin is greater than 1.2 V, the part is enabled. If the
EN voltage falls below 1.1 V, the chip is disabled. The precision
enable threshold voltage allows the ADP2300/ADP2301 to be
easily sequenced from other input/output supplies. It can also be
used as programmable UVLO input by using a resistive divider.
An internal 1.2 μA pull-down current prevents errors if the EN pin
is floating.
INTEGRATED SOFT START
The ADP2300/ADP2301 include internal soft start circuitry
that ramps the output voltage in a controlled manner during
startup, thereby limiting the inrush current. The soft start time is
typically fixed at 1460 μs for the ADP2300 and at 730 μs for the
ADP2301.
CURRENT LIMIT
The ADP2300/ADP2301 include current-limit protection circuitry
to limit the amount of positive current flowing through the high-
side MOSFET switch. The positive current limit on the power
switch limits the amount of current that can flow from the input
to the output.
IN
), the output voltage (V
OUT
), the inductor,

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