NCP1562ADR2G ON Semiconductor, NCP1562ADR2G Datasheet - Page 2

• Manufacturer Part Number: NCP1562ADR2G
• Description: IC CLAMP/RESET PWM CTLR 16-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1562ADR2G

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1MHz
• Duty Cycle: 85%
• Voltage - Supply: 23.2 V ~ 100 V
• Buck: No
• Boost: Yes
• Flyback: Yes
• Inverting: Yes
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-SOIC (3.9mm Width)
• Frequency-max: 1MHz
• Topology: Flyback, Forward, Half-Bridge
• Output Voltage: 20 V
• Output Current: 2000 mA, 1000 mA
• Switching Frequency: 1000 KHz
• Duty Cycle (max): 85 %
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Fall Time: 10 ns
• Mounting Style: SMD/SMT
• Rise Time: 26 ns
• Synchronous Pin: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1562ADR2G; NCP1562ADR2GOSTR

C
3 V
2 V
CSKIP
R1
R2
C
C
C
R
AUX
SS
T
T
V
V
in
ref
V
UVOV
RTCT
CSKIP
SYNC
AUX
CS
SS
V
12
10
16
4
1
in
2
6
7
I
+
--
500 mA
inhibit
I
I
SS(C)
SS(D)
V
V
V
V
REF
AUX(on)
AUX(off1)
AUX(off2)
Soft--Stop
Complete
SYNC
+
--
I
start
Oscillator
/
Detector
I
/
0.2 V = A ver.
(0.5 V = B ver.)
CSKIP(D)
I
UVOV
CSKIP(C)
DMAX
Clock
Clock
Disable
Control Logic
+
--
V
Soft--Start
Soft--Stop
REF
- -
+
Enable_Output
1 V
Fixed 80 ns LEB
OUT
Control
CSKIP
Shutdown
Logic
Figure 1. Detailed Block Diagram
Thermal
Enable
STOP
V
V
Comparator
X
- -
AUX(on)
+
http://onsemi.com
CSKIP
Comparator
+
Clock
--
Soft--Start
Complete
+
- -
V
Ilimit
One Shot
CSKIP
Saturated
Pulse
Not
+
- -
2
- - +
STOP
Comparator
Clock
Comparator
Soft--Start
FF
3 V
Saturated
Comparator
Saturation
+
V
--
Comparator
Not
Central
UV
- - +
S
Dominant
Reset
Latch
R
Logic
PWM
Soft--Stop
Complete
Disable_VREF
+
- -
Enable_Output
+
- -
P.O.R.
Q
Q
FF Reset
Bias
S
Dominant
Reset
Latch
R
+
--
0.2 V
FF Reset
+
--
V
Delay
Logic
3.6 V
X
Q
5.0 V Reference
270 kΩ
V
AUX
V
REF
20 kΩ
V
V
AUX
AUX
15
14
13
11
V
FF
8
V
t
5
9
3
GND
D
EA
REF
OUT1
PGND
OUT2
V
in
R
D
R
C
FF
FF