IR3624MPBF International Rectifier, IR3624MPBF Datasheet - Page 10

• Manufacturer Part Number: IR3624MPBF
• Description: IC CTRLR PWM SYNC BUCK 10-MLPD
• Manufacturer: International Rectifier

Specifications of IR3624MPBF

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 660kHz
• Duty Cycle: 71%
• Voltage - Supply: 4.5 V ~ 14 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 10-MLPD
• Frequency-max: 660kHz
• Package: 10-Lead MLPD
• Circuit: Sync PWM Controller
• Vcc (min): 4.0
• Vcc (max): 14
• Vout (min): 0.6
• Vout (max): Vcc * 0.71
• Iout (a): 10
• Switch Freq (khz): Internal 600kHz
• Pbf: PbF Option Available
• For Use With: IRPP3624-12A - KIT REF DES 12A 1PH SYNC BUCK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Over-Current Protection
The over current protection is performed by
sensing current through the R
MOSFET. This method enhances the converter’s
efficiency and reduce cost by eliminating a
current sense resistor. As shown in figure 7, an
external resistor (R
turned on, the inductor current flows through the
Q2 and results a voltage which is given by:
The critical inductor current can be calculated by
setting:
OCSet pin and the drain of low side MOSFET
(Q2) which sets the current limit set point.
The internal current source develops a voltage
across R
Fig. 7: Connection of over current sensing resistor
An over current is detected if the OCSet pin goes
below ground. This trips the OCP comparator
and cycles the soft start function in hiccup mode.
The hiccup is performed by charging and
discharging the soft-start capacitor in certain
slope rate. As shown in figure 8 a 3uA current
source is used to discharge the soft-start
capacitor.
The OCP comparator resets after every soft start
cycles, the converter stays in this mode until the
overload or short circuit is removed. The
converter will automatically recover.
Hiccup
Control
V
OCSet
IR3624
V
I
OCSet
SET
SET
=
(I
=
. When the low side MOSFET is
OCSet
=
I
I
L
OCSET
(I
(
critical
OCSet
∗
R
)
=
OCSet
∗
R
R
SET
OCSet
OCSet
OCSet
)
R
) is connected between
−
DS
(R
)
∗
(
−
on
R
I
DS(on)
OCSet
SET
)
(R
DS(on)
∗
DS(on)
I
L
)
∗
--(
) I
Q1
Q2
L
) 3
of low side
=
--(
L1
0
) 2
V
OUT
The value of R
circuit to ensure that the over current protection
circuit activates as expected. The IR3624 current
limit is designed primarily as disaster preventing,
"no blow up" circuit, and doesn't operate as a
precision current regulator.
The OCP circuit starts sampling current when the
low gate drive is about 3V. The OCSet pin is
internally clamped during deadtime to prevent
false trigging, figure 9 shows the OCSet pin
during one switching cycle. As it is shown there
is about 150ns delay to mask the deadtime, since
this node contains switching noises, this delay
also functions as a filter.
Ch1: Inductor point, Ch2:Ldrv, Ch3:OCSet
Fig. 9: OCset pin during normal condition
Fig. 8: 3uA current source for discharging
I
OCSet
soft-start capacitor during hiccup
SS1 / SD
*R
OCSet
SET
20uA
Deadtime
20
should be checked in an actual
Blanking time
28uA
3uA
IR3624MPBF
Clamp voltage
OCP
10